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Process for manufacturing buried channels and cavities in semiconductor material wafers

Details

Inventors: Barlocchi, Gabriele; Villa, Flavio; Corona, Pietro;
Assignee: STMicroelectronics S.r.l. (Agrate Brianza, IT)
Primary Examiner: Nelms; David
Assistant Examiner: Vu; David
Attorney, Agent or Firm: Jorgenson; Lisa K., Tarleton; E. Russell SEED IP Law Group, PLLC

A process of forming on a monocrystalline-silicon body an etching-aid region of polycrystalline silicon; forming, on the etching-aid region a nucleus region of polycrystalline silicon surrounded by a protective structure having an opening extending as far as the etching-aid region; TMAH-etching the etching-aid region and the monocrystalline body to form a tub-shaped cavity; removing the top layer of the protective structure; and growing an epitaxial layer on the monocrystalline body and the nucleus region. The epitaxial layer, of monocrystalline type on the monocrystalline body and of polycrystalline type on the nucleus region, closes upwardly the etching opening, and the cavity is thus completely embedded in the resulting wafer.

DETAILED DESCRIPTION The embodiments of the present invention provide a process that eliminates the disadvantages of the known solutions.
According to an embodiment of the present invention, a process for manufacturing buried cavities in semiconductor material wafers and a semiconductor material wafer are provided.
The process includes forming a nucleus region in a monocrystalline body surrounded by a protective structure, forming a cavity beneath the nucleus region, removing at least a top portion of the protective structure, and growing an epitaxial layer on the body and over the nucleus region.

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