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| Control of backgate bias for low power high speed CMOS/SOI devices |
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| Manufacturing method for SOI-type thin film transistor |
| An object of the present invention is to provide a thin film transistor having an SOI structure in ... |
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| Method of via formation for the multilevel interconnect integrated circuits |
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| Semiconductor device and method for forming the same |
| It is an object of the present invention to provide an insulated-gate FET free of the foregoing ... |
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| Self-aligned double-gate MOSFET by selective lateral epitaxy |
| OF THE PREFERRED EMBODIMENT The invention is a novel method of fabricating a double-gate MOSFET ... |
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| Transistor device employing crystallization catalyst |
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Process for producing a luminous element of group III nitride semi-conductor
| Details |
Inventors: Miyachi, Mamoru; Tanaka, Toshiyuki; Kimura, Yoshinori; Takahashi, Hirokazu; Sato, Hitoshi; Watanabe, Atsushi; Ota, Hiroyuki; Akasaki, Isamu; Amano, Hiroshi;
Assignee: Pioneer Electronic Corporation (Tokyo, JP)
Primary Examiner: Niebling; John
Assistant Examiner: Pham; Long
Attorney, Agent or Firm: Finnegan, Henderson, Farabow, Garrett & Dunner, L.L.P.
A process for producing a semiconductor emitting device of group III nitride semiconductor having a crystal layer (Al.sub.x Ga.sub.1-x).sub.1-y In.sub.y N (0.ltoreq.x.ltoreq.1, 0.ltoreq.y.ltoreq.1) includes; a step of forming at least one pn-junction or pin-junction and a crystal layer (Al.sub.x Ga.sub.1-x).sub.1-y In.sub.y N (0.ltoreq.x.ltoreq.1, 0.ltoreq.y.ltoreq.1) to which a group II element is added; and a step of forming electrodes on the crystal layer. The process further includes an electric-field-assisted annealing treatment in which the pn-junction or pin-junction is heated to the predetermined temperature range while forming and maintaining an electric field across the pn-junction or pin-junction for at least partial time period of the predetermined temperature range via the electrodes. |
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DETAILED DESCRIPTION It is therefore an object of the present invention is to provide a process for producing a light emitting diode or a semiconductor laser diode in which the mutual diffusion of the acceptor impurity in the grown layers is suppressed and for establishing the necessary p-type carrier concentration in the emitting device and to provide the device.
A process for producing a semiconductor emitting device of group III nitride semiconductor having a crystal layer (Al.
sub.
x Ga.
sub.
1-x).
sub.
1-y In.
sub.
y N (0.
ltoreq.
x.
ltoreq.
1, 0.
ltoreq.
y.
ltoreq.
1) according to the present invention, comprises the steps of; forming at least one pn-junction or pin-junction and a crystal layer (Al.
sub.
x Ga.
sub.
1-x).
sub.
1-y In.
sub.
y N (0.
ltoreq.
x.
ltoreq.
1, 0.
ltoreq.
y.
ltoreq.
1) to which a group II element is added; forming electrodes on said crystal layer; and heating said pn-junction or pin-junction to the predetermined temperature range while forming and maintaining an electric field across said pn-junction or pin-junction for at least partial time period of the predetermined temperature range via said electrodes.
Namely, a semiconductor emitting device comprising at least one pn-junction or pin-junction between a n-type crystal layer made of a group III nitride semiconductor (Al.
sub.
x Ga.
sub.
1-x).
sub.
1-y In.
sub.
y N (0.
ltoreq.
x.
ltoreq.
1, 0.
ltoreq.
y.
ltoreq.
1) and a p-type crystal layer made of a group II element added group III nitride semiconductor and electrodes formed on the crystal layers across the pn-junction or pin-junction in which said pn-junction or pin-junction is heated to the predetermined temperature range while forming and maintaining an electric field across said pn-junction or pin-junction for at least partial time period of the predetermined temperature range via said electrodes whereby the annealing temperature is lowered.
The crystal layer of the group III nitride semiconductor (Al.
sub.
x Ga.
sub.
1-x).
sub.
1-y In.
sub.
y N (0.
ltoreq.
x.
ltoreq.
1, 0.
ltoreq.
y.
ltoreq.
1) and pn-junction or pin-junction are formed by using the so-called the metalorganic chemical vapor deposition method
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MEMS 
