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Processes for hermetically packaging wafer level microscopic structures
| Details |
Inventors: Cheung, Kin P.;
Assignee: Rutgers, The State University of New Jersey (New Brunswick, NJ)
Primary Examiner: Nelms; David
Assistant Examiner: Hoang; Quoc
Attorney, Agent or Firm: Watov; Kenneth, Watov & Kipnes, P.C.
A process for hermetically packaging a microscopic structure including a MEMS device is provided. The process for the present invention includes the steps of depositing a capping layer of sacrificial material patterned by lithography over the microscopic structure supported on a substrate, depositing a support layer of a dielectric material patterned by lithography over the capping layer, providing a plurality of vias through the support layer by lithography, removing the capping layer via wet etching to leave the support layer intact in the form of a shell having a cavity occupied by the microscopic structure, depositing a metal layer over the capping layer that is thick enough to provide a barrier against gas permeation, but thin enough to leave the vias open, and selectively applying under high vacuum a laser beam to the metal proximate each via for a sufficient period of time to melt the metal for sealing the via. |
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DETAILED DESCRIPTION The present invention is directed generally to a process for packaging a microscopic structure to yield a cavity-containing microstructure such as, for example, a microelectromechanical system (MEMS) device, and more specifically for hermetically packaging the microscopic structure.
The cavity of the MEMS device may be configured to be open to ambient or pressure sealed as dictated by the needs and application of the corresponding MEMS device.
The presence of a high integrity hermetic pressure seal allows the cavity to be maintained in an evacuated state, or occupied by a specific gas composition in a pressurized or unpressurized state, and ensures that the cavity remains free of microparticles and undesirable gases that may adversely affect the performance of the MEMS device.
This process can be utilized in connection with a range of microscopic-scale devices including, but not limited to, resonators, inertial sensors, variable capacitors, switches, and the like.
The process for the present invention overcomes many of the limitations typically associated with conventional sealed cavity microscopic structures.
In particular, a sealed-cavity microscopic structure is provided that incorporates both a high integrity hermetic pressure seal, and a structure sufficiently robust to withstand the rigors of normal handling and operation.
The process for the present invention can be utilized for chip-scale packaging (CSP) and for wafer-level chip-scale packaging (WLCSP) to effectively provide a low cost and highly adaptable approach for batch packaging microscopic structures.
In one aspect of the present invention, there is provided a process for packaging a microscopic structure, said process comprising the steps of: assembling a microscopic structure substantially enclosed within a cavity defined by a shell having at least one throughhole extending therethrough in communication with the cavity; and applying a molten material to fill the at least one throughhole wherein the molten material subsequently solidifies to yield a hermetic pressure seal
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MEMS 
