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Semiconductor package and manufacturing method thereof
| Details |
Inventors: Nakazawa, Takahito; Sugizaki, Yoshiaki;
Assignee: Kabushiki Kaisha Toshiba (Kawasaki, JP)
Primary Examiner: Thomas; Tom
Assistant Examiner: Nadav; Ori
Attorney, Agent or Firm: Finnegan, Henderson, Farabow, Garrett & Dunner, L.L.P.
In order to suppress the warp of a semiconductor package of an over-coat structure, when thermal expansion coefficient, Young's modulus and thickness of the wiring substrate are .alpha.s, Es and Hs, respectively, and thermal expansion coefficient, Young's modulus and thickness of the resin layer are .alpha.r, Er and Hr, respectively, the value R of (.alpha.r.multidot.Er.multidot.Hr)/(.alpha.s.multidot.Es.multidot.Hs) is set to be approximately 0.6 or more. With adoption of such a configuration, stress exerting on a semiconductor package can be effectively alleviated, and coplanarity of the semiconductor package can be improved. |
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DETAILED DESCRIPTION The present invention was carried out to solve these problems.
That is, an object of the present invention is to provide a semiconductor package which is thin, compact and highly reliable.
Further, another object of the present invention is to provide a thin semiconductor package of high connection reliability.
Still another object of the present invention is to provide a semiconductor package of a structure suitable for high density packaging.
In order to solve such problems, a semiconductor package of the present invention adopts such a configuration as described below.
The first aspect of a semiconductor package of the present invention Comprises, a wiring substrate having a first face and a second face, the first face having a first area and a second area surrounds the first area, and at least a first connecting pad arranged in the first area; a semiconductor element having a first face and a second face, the semiconductor element having at least a connecting terminal formed on the first face, and the semiconductor element being mounted on the first area of the wiring substrate in a face-down type; at least a conductive bump connecting the first connecting pad of the wiring substrate and the connecting terminal of the semiconductor element; and, a resin layer disposed on the first face of the wiring substrate, the resin layer disposed so that the second face of the semiconductor element being exposed, side faces of the semiconductor element being sealed, and a gap between the first face of the wiring substrate and the first face of the semiconductor element being filled.
It is also possible to comprises a wiring substrate which has a first face having a first area thereon a first connecting pads are disposed and a second area in the circumference of the first area and a second face; a semiconductor element which has a first face thereon connecting terminals are disposed and a second face, and is mounted in a face-down way on the first area of the first face of the wiring substrate; conductive bumps connecting the first connecting pads of the wiring substrate and connecting terminals of the semiconductor element; and a resin layer for sealing disposed such that the second face of the semiconductor element is exposed, and side surface of the semiconductor element is covered, and the resin layer fills a gap between the semiconductor element and the wiring substrate
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MEMS 
