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Thin film transistor device and method of manufacturing the same
| Details |
Inventors: Kurosawa, Yoshio;
Assignee: Sharp Kabushiki Kaisha (Osaka, JP)
Primary Examiner: Louie; Wai-Sing
Assistant Examiner:
Attorney, Agent or Firm: Greer, Burns & Crain, Ltd.
A semiconductor film into which p-type impurities have been introduced is formed on a substrate. Subsequently, a resist film is formed on the semiconductor film, and dry etching is performed to the semiconductor film using the resist film as a mask. Due to the dry etching, the edge portion of the semiconductor film protrudes from the resist film. Next, the p-type impurities are introduced into the edge portion of the semiconductor film using the resist film as a mask. The volume density of the p-type impurities in a channel edge portion of the semiconductor film is two to five times the volume density of the p-type impurities in a channel center section. Subsequently, the resist film is removed to form a gate insulating film and a gate electrode. |
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DETAILED DESCRIPTION The object of the present invention is to provide a thin film transistor device in which both the n-type TFT and the p-type TFT are turned off at a predetermined gate voltage (0V for example) and the power consumption can be reduced compared to the conventional device, and a method of manufacturing the device.
The thin film transistor device according to the first aspect of the present invention comprises: a substrate; and a thin film transistor formed above the substrate and has a semiconductor film, where the p-type impurities have been introduced in the channel region, as the operation layer, in which the gradient is provided for the edge portion of the semiconductor film and the volume density of the p-type impurities in the edge portion of the channel region is twice to five times the volume density of the p-type impurities in the central section of the channel region.
In the present invention, the volume density of the p-type impurities in the edge portion of the channel region is as high as twice to five times the volume density of the p-type impurities in the central section of the channel region.
This makes the surface density of the p-type impurities in the edge portion of the channel region become substantially equal to the surface density of the p-type impurities in the central section of the channel region, and the threshold voltage of the parasitic transistor formed at the gradient section increases.
As a result, the hump in the I V characteristic of the n-type thin film transistor disappears, and both the n-type thin film transistor and the p-type thin film transistor can be turned off at the predetermined gate voltage.
The method of manufacturing the thin film transistor according to the second aspect of the present invention comprises the steps of: forming the semiconductor film, into which the p-type impurities have been introduced, above the substrate; forming a resist film on a thin film transistor formation region of the semiconductor film; etching in which the semiconductor film is etched using the resist film as a mask; introducing the p-type impurities into a portion of the semiconductor film, which protrudes from the resist film, using the resist film as a mask; removing the resist film; forming the gate insulating film; and forming the gate electrode
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MEMS 
