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Trench isolation method
| Details |
Inventors: Lee, Han-Sin; Park, Moon-Han;
Assignee: Samsung Electronics Co., Ltd. (KR)
Primary Examiner: Niebling; John F.
Assistant Examiner: Pompey; Ron
Attorney, Agent or Firm: Mills & Onello LLP
In a trench isolation method, an etching mask pattern for forming a trench is formed on a semiconductor substrate. The substrate is etched to form a trench. An insulating layer is formed to fill the trench, and then a material layer is formed on the insulating layer. In this case, the material layer is made of material formed at a high temperature to density the insulating layer. The material layer and the insulating layer are planarly etched and the etching mask pattern is removed, so that a trench isolation layer is completed. Accordingly, although a densification process is avoided, it is possible to form a device isolation layer having a favorable surface profile. |
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DETAILED DESCRIPTION Therefore, it is an object of the present invention to provide a trench isolation method which avoids the need for a densification process for densifying the insulating layer formed in the trench. According to an aspect of the present invention, a pad oxide layer and etch-stop layer are sequentially formed on a semiconductor substrate. With a patterning process, the etch-stop layer and the pad oxide layer are sequentially etched to form an etching mask pattern that exposes a predetermined region of the semiconductor substrate. Using the etching mask pattern as an etching mask, the exposed semiconductor substrate is etched to form a trench. An oxide layer is formed on an inner wall and a bottom of the trench, and then an oxidation barrier layer is formed on the oxide layer. An insulating layer to fill the trench is formed on an overall surface of the above resulting structure where the oxidation barrier layer is formed. Using a layer formed at a high temperature, a material layer is formed on the insulating layer. During formation of the material layer, the insulating layer is densified. The material layer is made of one selected from a group consisting of, for example, HTO (high temperature oxide), high temperature USG (undoped silicate glass), polysilicon, and amorphous silicon that are formed at a temperature of 500. degree. C. and higher. The material layer and the insulating layer are planarly etched down to a top surface of the etching mask pattern, so that a device isolation layer is formed. Then, the exposed etching mask pattern is removed to form a trench isolation layer.
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