Zero-crossing triac and method

DETAILED DESCRIPTION OF THE DRAWINGS FIG.
1 schematically illustrates a portion of a circuit suitable for implementing a zero-crossing triac 100.
Triac 100 includes a gating section 113 and an output section having substantially identical output stages 101 and 102.
Gating section 113 is electrically isolated from the output section but includes an optical emitter 114 that is utilized to optically couple section 113 to the output section.
As will be seen hereinafter, emitter 114 emits light that is utilized to provide base current for transistors within stages 101 and 102.
Typically, emitter 114 is a light emitting diode (LED).
Stage 101 includes a high breakdown voltage transistor 103 that typically is a PNP or first conductivity type transistor.
Transistor 103 typically has a breakdown voltage of at least 600 volts in order to withstand the high line voltages applied across transistor 103.
A first current electrode or emitter of transistor 103 is connected to a first terminal 104 of triac 100 while a second current electrode or collector is connected to a control electrode or base of a transistor 112.
Transistors 103 and 112 are formed to function as a semiconductor control rectifier (SCR).
Consequently, transistor 112 typically is an NPN or second conductivity type transistor.
A first current electrode or collector of transistor 112 is connected to a control electrode or base of transistor 103 while a second current electrode or emitter is connected a second terminal 108 of triac 100.
Because transistors 103 and 112 are formed as a SCR, the base of transistor 112 typically is formed as the collector portion of transistor 103.
Stage 101 also includes a zero-crossing detection circuit 116 that is utilized to prevent enabling transistor 112, thus, inhibit firing the SCR, except when the voltage applied to terminals 104 and 108 is near a zero-crossing point.
An enhancement mode field effect transistor (FET) 107 is connected across the base emitter junction of transistor 112 by having a first current electrode or source connected to the emitter of transistor 112 and a second current electrode or drain connected to the base of transistor 112