Resin sealed semiconductor device having improved arrangement for reducing thermal stress within the device
It is an object of the present invention to provide a resin sealed semiconductor device that can prevent breakage resulting from a thermal stress, is economical, and has high reliability. It is anothe... Read More
Inventors: Kawano, Kenya; Doi, Hiroaki; Yasukawa, Akio; Miura, Hideo;, Assignee: Hitachi, Ltd. (Tokyo, JP) |
Electrochemical etch for high tin solder bumps
The purposes of the invention have been achieved by providing according to a first aspect of the invention an aqueous electrochemical etchant for etching metals in the presence of one or more metals n... Read More
Inventors: Fanti, Lisa A.; Cotte, John Michael; Eichstadt, David Ely;, Assignee: International Business Machines Corporation (Armonk, NY) |
Aspherical microstructure, and method of fabricating the same
It is an object of the present invention to provide a method of fabricating an aspherical microstructure, which can readily fabricate and control the aspherical profile of the microstructure, and incr... Read More
Inventors: Ushijima, Takashi; Yagi, Takayuki;, Assignee: Canon Kabushiki Kaisha (Tokyo, JP) |
Field-effect photo-transistor
The present invention is directed to a high output impedance, three-terminal, photosensing electrical device integrated on a semiconductor substrate. The photosensing electrical device has a body term... Read More
Inventors: Yiannoulos, Aristides A.;, Assignee: Lucent Technologies Inc. (Murray Hill, NJ) |
NMOS circuit in isolated wells that are connected by a bias stack having pluralirty of diode elements
OF THE INVENTIONS In FIGS. 2 and 3, an integrated NMOS circuit comprises generally an active stack having a plurality of active devices M4, M5 and M6, shown single-ended but could represent a simplif... Read More
Inventors: Kaatz, Gary;, Assignee: Motorola, Inc. (Schaumburg, IL) |
Process for preparing semiconductor substrate by bringing first and second substrates in contact
An object of the present invention is to provide a semiconductor substrate, where generation of fine voids due to the surface unevenness of bonded substrates is suppressed when an SOI substrate of hig... Read More
Inventors: Yonehara, Takao; Yamagata, Kenji;, Assignee: Canon Kabushiki Kaisha (Tokyo, JP) |
Solar cell including multi-crystalline silicon and a method of texturizing the surface of p-type multi-crystalline silicon
An object of the invention is to propose a solar cell including multi-crystalline silicon whose efficiency is improved compared with presently known and used solar cells. Another object of the present... Read More
Inventors: Le, Quang Nam; Sarti, Dominique; Levy-Clement, Claude; Bastide, Stephane;, Assignee: Photowatt International S.A. (Bourgoin-Jallieu, FR) |
Multilayered wafer with thick sacrificial layer using porous silicon or porous silicon oxide and fabrication method thereof
To solve the above problems, an objective of the present invention is to provide a multilayered wafer obtained by forming a porous silicon layer having a thickness of several tens of micrometers on a ... Read More
Inventors: Kang, Sung-gyu; Lee, Ki Bang; Choi, Jae-joon; Jeong, Hee-moon;, Assignee: Samsung Electronics Co., Ltd. (KR) |
Pitcher-shaped active area for field effect transistor and method of forming same
OF THE INVENTION Although the present invention may be readily adapted to a variety of methods of fabricating a FET, with reference to FIGS. 1-4, the following is an example of a method of fabricatio... Read More
Inventors: Beintner, Jochen; Divakaruni, Rama; Faltermeier, Johnathan; Flaitz, Philip L.; Gluschenkov, Oleg; Heenan, Carol J.; Jammy, Rajarao; Kim, Byeong; Seitz, Mihel; Sudo, Akira; Takegawa, Yoichi;, Assignee: International Business Machines Corporation (Armonk, NY) |
Process for growing gallium arsenide on silicon substrate
The above and other objects of the present invention are obtained by providing process for growing a GaAs layer on an Si substrate, said process comprising: forming a first GaAs layer in the amorphous... Read More
Inventors: Ogasawara, Kazuto;, Assignee: Fujitsu Limited (Kawasaki, JP) |
Low dislocation density semiconductor device
What is claimed is: 1. A low dislocation density semiconductor structure comprising a non-metallic substrate having the usual dislocation density for the material of the substrate, a first epitaxial l... Read More
Inventors: Mooney, John B.; Sher, Arden;, Assignee: SRI International (Menlo Park, CA) |
Method for making low defect density semiconductor heterostructure and devices made thereby
Referring to the drawings. FIG. 1 is a flow diagram illustrating the process for making a low defect density semiconductor heterostructure in accordance with the invention. As shown, the first step i... Read More
Inventors: Brasen, Daniel; Fitzgerald, Jr., Eugene A.; Green, Martin L.; Xie, Ya-Hong;, Assignee: AT&T Bell Laboratories (Murray Hill, NJ) |
Processes for lift-off of thin film materials or devices for fabricating three dimensional integrated circuits, optical detectors, and micromechanical devices
OF THE PREFERRED EMBODIMENTS I. Three Dimensional Integrated Circuits FIG. 1 illustrates a multilayered integrated circuit cube (IC), 10 wherein electromagnetic communication can occur in all directi... Read More
Inventors: Jokerst, Nan M.; Brooke, Martin A.; Allen, Mark G.;, Assignee: Georgia Tech Research Corporation (Atlanta, GA) |
Method of manufacturing an optoelectronic semiconductor device
We claim: 1. A method of manufacturing an optoelectronic semiconductor device with a semiconductor body (100), whereby a semiconductor layer structure is provided on a semiconductor substrate (1) by m... Read More
Inventors: Binsma, Johannes J. M.; Van Der Heijden, Johannes M. M.;, Assignee: U.S. Philips Corporation (New York, NY) |
Hybrid optical integration assembly using optical platform
It is an object of the present invention to provide an optical assembly structure which is capable of mounting an element generating a large amount of heat and a high impedance optical element on the ... Read More
Inventors: Tsuji, Shinji; Takahashi, Ryuta; Shishikura, Masato; Kikuchi, Satoru; Aoki, Satoshi;, Assignee: Hitachi, Ltd. (Tokyo, JP); Hitachi Cable, Ltd. (Tokyo, JP); Hitachi Tohbu Semiconductor, Ltd. (Saitama-ken, JP); Nippon Telegraph and Telephone Corporation (Tokyo, JP) |
Self-aligned transition from ridge to buried heterostructure waveguide, especially for multi-wavelength laser array integration
The invention can be described as both the structure and its method of making of an optical integrated circuit in which a ridge waveguide is coupled to a buried heterostructure waveguide through a tra... Read More
Inventors: Amersfoort, Martin; Zah, Chung-en;, Assignee: Tellium, Inc. (Edison, NJ) |
Process for bonding crystalline substrates with different crystal lattices
The present invention is directed to a process for bonding two wafers together each wafer having a crystal lattice structure that is different from the other. The invention is further directed to a pr... Read More
Inventors: Levine, Barry Franklin; Pinzone, Christopher James;, Assignee: Lucent Technologies Inc. (Murray Hill, NJ) |
Process for precise multichip integration and product thereof
It is an object of the present invention to provide a manufacturing process for forming a very dense integrated circuit module with integrated circuit chips and a substrate carrier assembled in a self... Read More
Inventors: Pogge, H. Bernhard; Iyer, Subramania S.;, Assignee: International Business Machines Corporation (Armonk, NY) |
Laser diode and method of fabrication thereof
What is claimed is: 1. A semiconductor laser device comprising: a group IV semiconductor substrate; an active region within a laser cavity formed on the substrate, the active region comprising a quant... Read More
Inventors: Noel, Jean-Paul F.; Adams, David M.;, Assignee: Nortel Networks Corporation (Montreal, CA) |
Relaxed InxGa(1-x)as buffers
It is therefore an object of the invention that with the appropriate grading rate, there is an unforeseen higher temperature window, which can be accessed with MOCVD and not MBE, in which high quality... Read More
Inventors: Fitzgerald, Eugene A.; Bulsara, Mayank T.;, Assignee: Massachusetts Institute of Technology (Cambridge, MA) |
Semiconductor photo-detector with square-shaped optical wave-guide
What is claimed is: 1. A semiconductor photo-detector which includes a square-shaped optical wave-guide, comprising: reflection layers deposited on a pair of parallel surfaces of said square-shaped op... Read More
Inventors: Sugiyama, Mitsuhiro;, Assignee: NEC Corporation (Tokyo, JP) |
Back-biasing to populate strained layer quantum wells
The invention involves semiconductor devices that include buried channel layers having heterojunction offsets, and involves the use of back-biasing to control free charge carrier density in a buried c... Read More
Inventors: Hammond, Richard; Braithwaite, Glyn;, Assignee: AmberWave Systems Corp. (Salem, NH) |
High-voltage-resistant MOS transistor, and corresponding manufacturing process
An important idea of the invention includes arranging for the gate polysilicon doping to be non-uniform, and in particular of making it different in the proximities of the source and drain active regi... Read More
Inventors: Fratin, Lorenzo; Riva, Carlo;, Assignee: SGS-Thomson Microelectronics S.r.l. (Agrate Brianza, IT) |
High overpressure low range pressure sensor
The present invention relates to a pressure sensor that utilizes a base plate and a diaphragm which is deflected under pressure relative to the base plate. The diaphragm is made of brittle material an... Read More
Inventors: Lutz, Mark A.; Krueger, William B.;, Assignee: Rosemount Inc. (Eden Prairie, MN) |
High pressure piezoresistive transducer
A method of fabricating a piezoresistive pressure transducer that is capable of operating at high pressures while maintaining a substantially linear pressure versus stress output over its full range o... Read More
Inventors: Kurtz, Anthony D.; Bemis, Andrew V.; Nunn, Timothy A.; Ned, Alexander A.;, Assignee: Kulite Semiconductor Products, Inc. (Leonia, NJ) |
Method for producing group III nitride compound semiconductor device
As a fruit of the eager examination to achieve the object of the invention, the inventor has hit on the following invention: A method of producing a Group III nitride compound semiconductor device, co... Read More
Inventors: Chiyo, Toshiaki;, Assignee: Toyoda Gosei Co., Ltd. (Aichi, JP) |
Photosensor with organic and inorganic insulation layers
It is an object of the present invention to provide a photosensor which has the protective performance substantially the same as a SiNH layer and has a high productivity and stable properties. It is a... Read More
Inventors: Masaki, Yuichi; Fukaya, Masaki; Furushima, Teruhiko; Terada, Katsunori; Kakimoto, Seiji;, Assignee: Canon Kabushiki Kaisha (Tokyo, JP) |
Tantalum-aluminum oxide coatings for semiconductor devices
In accordance with one aspect of our invention, an active semiconductor device includes a coating which comprises an oxide of tantalum and aluminum. The active device illustratively comprises an IC, o... Read More
Inventors: Chakrabarti, Utpal Kumar; Grodkiewicz, William Henry; Wu, Ping;, Assignee: Lucent Technologies Inc. (Murray Hill, NJ) |
Semiconductor device
The present invention is made to solve the aforementioned problems. An object of the present invention is to provide a semiconductor device with high reliability capable of preventing cracking in a la... Read More
Inventors: Fujiki, Noriaki; Yamashita, Takashi; Harada, Shigeru; Miki, Kazunobu;, Assignee: Mitsubishi Denki Kabushiki Kaisha (Tokyo, JP) |
Method for manufacturing light-emitting device using a group III nitride compound semiconductor
OF THE PREFERRED EMBODIMENT In the present invention, the cap layer is formed by using a semiconductor layer which has a composition almost the same as the composition of the underlying well layer. B... Read More
Inventors: Watanabe, Hiroshi; Shibata, Naoki;, Assignee: Toyoda Gosei Co., Ltd. (Aichi-ken, JP) |
MEMS 
