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Home Metal Working Capacitor-structures

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 Capacitor structures

Details
Inventors: Rhodes, Howard E.; Breiner, Lyle D.; Ireland, Philip J.; Doan, Trung Tri; Sandhu, Gurtej S.; Sharan, Sujit;
Assignee: Micron Technology, Inc. (Boise, ID)
Primary Examiner: Smith; Matthew
Assistant Examiner: Malsawma; Lex H.
Attorney, Agent or Firm: Wells St. John P.S.

Integrated circuitry capacitors and methods of forming the same are described. In accordance with one implementation, a capacitor plate is formed and a conductive layer of material is formed thereover. Preferably, the conductive layer of material is more conductive than the material from which the capacitor plate is formed. In a preferred implementation, the conductive layer of material comprises a titanium or titanium-containing layer. In another preferred implementation, the capacitor plate comprises an inner capacitor plate having an outer surface with a generally roughened surface area. In one aspect of this implementation, the roughened surface area comprises hemispherical grain polysilicon. Capacitors formed in accordance with the invention are particularly well suited for use in dynamic random access memory (DRAM) circuitry.

DETAILED DESCRIPTION Integrated circuitry capacitors and methods of forming the same are described.
In accordance with one implementation, a capacitor plate is formed and a conductive layer of material is formed thereover.
Preferably, the conductive layer of material is more conductive than the material from which the capacitor plate is formed.
In a preferred implementation, the conductive layer of material comprises a titanium or titanium-containing layer.
Other materials can be used such as chemical vapor deposited platinum, TiN, and the like.
In another preferred implementation, the capacitor plate comprises an inner capacitor plate having an outer surface with a generally roughened surface area.
In one aspect of this implementation, the roughened surface area comprises hemispherical grain polysilicon.
Capacitors formed in accordance with the invention are particularly well suited for use in dynamic random access memory (DRAM) circuitry.



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