Partially non-volatile dynamic random access memory formed by a plurality of single transistor cells used as DRAM cells and EPROM cells

DETAILED DESCRIPTION Herein described is a semiconductor memory referred to as Partially Non-Volatile Dynamic Random Access Memory (PNDRAM).
The PNDRAM consists of a plurality of one transistor (1T) or two transistor (2T) cells, acting as DRAM cells and EPROM cells.
The PNDRAM allows the BIOS or the core of the OS to be stored in EPROM cells in manufacturing or in a field.
The 1T (or 2T) cells, which are not used for the EPROM cells, work as conventional DRAM cells for a main memory.
The control protocol to access the DRAM cells and the EPROM cells can be fully compatible with existing DRAM standards, making the direct execution possible without requiring complicated logic.
The addressing space for the DRAM cells and the EPROM cells can also be flexibly configurable.
In one aspect of the invention, there is provided a partially non-volatile DRAM array formed by a plurality of cells, wherein a first subset of the plurality of cells acts as DRAM cells and a second subset of the plurality of cells acts as EPROM cells.
In a second aspect of the invention, there is provided a partially non-volatile DRAM array formed by a plurality of DRAM cells, wherein a subset of the plurality of DRAM cells is programmed to behave as EPROM cells.
In a third aspect of the invention, there is provided a method of structuring a DRAM made of a plurality of cells in a partially non-volatile memory, the method including the steps of having a first subset of the plurality of cells act as DRAM cells; and having a second subset of the plurality of cells behaves as EPROM cells.