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 Apparatus and method for mapping E1 signals into a digital cross-connect matrix space

Details
Inventors: Deschaine, Stephen A.; Entezari, Manouchehr; Nietubyc, Mark J.; Heissenhuber, Werner L.;
Assignee: Alcatel USA Sourcing, L.P. (Plano, TX)
Primary Examiner: Hsu; Alpus H.
Assistant Examiner:
Attorney, Agent or Firm: Baker & Botts, L.L.P.

Apparatus and method are provided which map E1 signals into a logical space of a predetermined number of DS1 signals. 24 selected DS0 signals that are part of the first E1 signal are mapped into the space of a first DS1 signal in the logical space. The 8 DS0 signals of the first E1 signal are then mapped into the space of a second DS1 signal in the logical space. Depending on the defined logical space, additional E1 signals may be mapped into the logical space of two DS1 signals in the same manner until the predetermined number of DS1 signal spaces in the defined logical space are filled.

DETAILED DESCRIPTION Accordingly, there is a need for apparatus and a method for mapping E1 signals into a digital cross-connect matrix space.
E1 signal mapping is needed when an interface unit is provided as a gateway between a digital cross-connect system and a digital loop carrier, which is coupled to subscriber lines carrying E1 signals.
In accordance with the present invention, 14 E1 signals are mapped into the matrix space of a digital cross-connect.
In one aspect of the invention, a method is provided which map E1 signals into a logical space of a predetermined number of DS1 signals.
24 selected DS0 signals that are part of the first E1 signal are mapped into the space of a first DS1 signal in the logical space.
The eight remaining DS0 signals of the first E1 signal are then mapped into the space of a second DS1 signal in the logical space.
Depending on the defined logical space, additional E1 signals may be mapped into the logical space of two DS1 signals in the same manner until the predetermined number of DS1 signal spaces in the defined logical space are filled.
In another aspect of the invention, there is provided apparatus for mapping E1 signals into a matrix space.
The apparatus includes a matrix interface for defining the matrix space as having a predetermined number of DS1 signals, mapping 24 selected DS0 signals partially comprising the first E1 signal into the space of a first DS1 signal in the matrix space, mapping remaining eight DS0 signals partially comprising the first E1 signal into the space of a second DS1 signal in the matrix space, and continuing the two mapping steps until the DS1 spaces in the defined matrix space are filled.



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