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Home Multiplexer-related Coherent-sequential-PN-code-extractor

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Details
Inventors: Zscheile, Jr., John W.; Lundquist, Alan E.; Wright, Robert A.;
Assignee: Loral Corporation (New York, NY)
Primary Examiner: Chin; Stephen
Assistant Examiner: Vo; Don N.
Attorney, Agent or Firm: Weinstein; Stanton D., Bowen; Glenn W., Sowell; John B.

Apparatus and a method for increasing the speed of acquisition of PN coded signals includes a novel PN code clock extraction circuit which is coupled in parallel to a code tracking loop and acquisition loop of a PN receiver of the type having a replica PN code generator which is slip controlled to synchronize with the received PN coded signals. The novel PN code clock extraction circuit detects the clock transition of the received PN coded signals and synchronized the replica PN code generator clock transition signals so that there is no misalignment during acquisition. A switch control in the acquisition loop circuit senses the synchronization of the replica PN code generator transition and the received PN code transition and disconnects the PN code clock extraction circuit after synchronization of clock transition and before acquisition of the PN code so that the acquisition loop detects the PN code synchronization with a full strength signal.

DETAILED DESCRIPTION It is a primary object of the present invention to provide a novel PN code clock extraction circuit for increasing the speed of acquisition of transmitted PN coded signals.
It is another primary object of the present invention to provide a novel PN code clock extraction circuit which permits an increase in the speed of search of transmitted PN coded signals by a factor of four.
It is another primary object of the present invention to provide a novel PN code clock extraction circuit for searching a transmitted PN code signal at the same speed as prior art signals in a jamming environment which is four times as intense.
It is another primary object of the present invention to provide a novel PN code clock extraction circuit which permits transmitted PN coded signals to have one-fourth the power as heretofore and still maintain the same acquisition speed.
It is a general object of the present invention to provide a novel PN code clock extraction circuit that can be added to existing receiving and detection circuits for new products or retrofitted into old products.



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