Data eye monitor

DETAILED DESCRIPTION I claim: 1.
A data eye monitor for a data input signal comprising: first means for comparing said input signal to a fixed reference voltage; second means for comparing said input signal to a variable reference voltage that is always higher than the fixed reference voltage, said first and second comparing means issuing different output signal levels when the comparison results are the same, and the same output signal levels when the comparison results are different; and third means coupled to the output of said first and second means and operative for providing said variable reference voltage for said second means, said variable reference voltage being proportional to the opening of said data eye and constituting the output voltage of said monitor, said third means including an OR-gate having inputs coupled to the outputs of said first and second comparing means.
2.
A monitor according to claim 1, wherein said first means includes a first comparator having an output, a first input receiving said input signal and a second input coupled to said fixed reference voltage, and a first D-type flip-flop coupled to said output of said first comparator and a clock input to clock a first output signal at said output of said first comparator into said third means.
3.
A monitor according to claims 1 or 2, wherein said fixed reference voltage is equivalent to an optimum decision level.
4.
A monitor according to claim 3, wherein said optimum decision level is where the least amount of errors in said input signal are expected.
5.
A monitor according to claim 3, wherein said optimum decision level is ground.
6.
A monitor according to claim 3, wherein said second means includes a second comparator having an output, a first input receiving said input signal and a second input coupled to said third means to receive said variable reference voltage, and a second D-type flip-flop having an inverting output and coupled to said output of said second comparator and said clock input, to clock a second output signal at said output of said second comparator through said inverting output into said third means