 Satellite relay system |
| It is an object, therefore, of the present invention to overcome the disadvantages and limitations ... |
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| Topology-based fault analysis in telecommunications networks |
| OF THE INVENTION Telecommunications networks are typically monitored by Remote Monitoring Systems (... |
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| Apparatus and method for identifying records of overflowed ACD calls |
| OF A PREFERRED EMBODIMENT FIG. 1 is a block diagram of an automatic call distribution (ACD) system ... |
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| Nonterrestrial cellular mobile telecommunication network |
| The multidimensional cellular mobile telecommunication system of the present invention extends the ... |
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| Methods and apparatus for charging a sense amplifier |
| We claim: 1. A circuit comprising: a sense amplifier having a node for receiving power; and a first ... |
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| Satellite cellular communication methods for performing cell-to-cell handoff |
| What is claimed is: 1. A method of handing-off a call of an individual subscriber unit (ISU) from a ... |
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| Remote control |
| According to one aspect of the present invention, there is provided a slave receiver for detecting ... |
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| Routing system in data communication with frame relay procedure control |
| What is claimed is: 1. A routing system for use in each station of first through N-th exchange ... |
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| Method and apparatus for determining the assignment of a mobile station to equipment lists |
| It is the object of the invention to determine which equipment list a mobile station is assigned to.... |
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Digital sample rate converters having matched group delay
| Details |
Inventors: McLaughlin, Kevin J; Adams, Robert W.;
Assignee: Analog Devices, Inc. (Norwood, MA)
Primary Examiner: Wamsley; Patrick
Assistant Examiner:
Attorney, Agent or Firm: Wolf, Greenfield & Sacks, P.C.
Methods and apparatus are provided for sample rate conversion in a system including two or more sample rate converters. The method includes the steps of providing an input clock and an output clock to each of the sample rate converters, measuring a sample rate ratio of the clocks in one of the sample rate converters, designated as a master, and controlling each of the sample rate converters with the sample rate ratio measured by the master. The measured sample rate ratio may be transmitted from the master to each of the other sample rate converters. This approach matches the group delays among the sample rate converters. |
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DETAILED DESCRIPTION According to a first aspect of the invention, a method is provided for operating two or more sample rate converters.
The method comprises the steps of providing an input clock to each of the sample rate converters, providing an output clock to each of the sample rate converters, measuring a sample rate ratio of the clocks in one of the sample rate converters, designated as a master, and controlling each of the sample rate converters with the sample rate ratio measured by the master.
Typically, the sample rate ratio of the input clock to the output clock is measured.
Depending on the system configuration, a single input clock or two or more input clocks may be used.
Furthermore, a single output clock or two or more output clocks may be used.
Preferably, the measured sample rate ratio is transmitted from the master to each of the other sample rate converters.
The sample rate ratio may be transmitted on an output data line of the master.
Each of the sample rate converters may select an internal or an external sample rate ratio in response to a mode select input.
According to another aspect of the invention, a sample rate conversion system is provided.
The sample rate conversion system comprises a master sample rate converter and one or more slave sample rate converters each adapted for receiving an input clock and an output clock.
The master sample rate converter includes a sample rate ratio circuit for measuring a sample rate ratio of the clocks.
The one or more slave sample rate converters each includes a sample rate conversion circuit for sample rate conversion according to the sample rate ratio measured by the master sample rate converter.
In one embodiment, the master sample rate converter and the one or more slave sample rate converters have data lines connected in a parallel configuration.
In another embodiment, the master sample rate converter and the one or more slave sample rate converters have data lines connected in a daisy chain configuration.
According to a further aspect of the invention, a sample rate converter comprises a sample rate conversion circuit for converting an input signal at a sample rate of an input clock to an output signal at a sample rate of an output clock according to a sample rate ratio, a sample rate ratio circuit for measuring the sample rate ratio of the clock sample rates, and a control circuit
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Multiplexer-related 
