High order switched-capacitor filter with DAC input

DETAILED DESCRIPTION The present invention disclosed and claimed herein comprises a digital-to-analog converter.
The digital-to-analog converter includes a digital portion for receiving an n-bit digital word and converting the n-bit digital word to an m-bit digital stream representing the value of a digital word m being less than n.
The m-bit digital stream is received by an m-bit DAC and converted to an analog value.
An analog portion receives the analog value and filters it to provide a filtered analog value.
The analog portion includes a switched-capacitor filter having greater than two stages of integration.
The noise of at least a succeeding stage above order two in the switched-capacitor filter has the noise thereof influenced by the input stage to the switched-capacitor filter.
In another aspect of the present invention, m has a value of "one" and the digital portion includes a delta-sigma digital modulator for outputting a one-bit digital stream having a one's density proportional to the input n-bit digital value.
The one-bit digital stream is input to a one-bit digital-to-analog converter, which is integral with the input stage of a switched-capacitor filter.
The switched-capacitor filter includes at least four stages of integration with the output of the fourth stage summed with the output of the first stage.
In this manner, the first stage reduces the noise output by the fourth stage.