Home | Links | Contact Us | More About Intellectual Property | Bookmark
Search patents:
Home Multiplexer-related Mailbox-registers-for-synchronizing-header-processing-execution

 Signaling mechanism for modem connection holding and reconnecting
The present invention provides techniques to shorten the startup and reconnection times associated ...


 System and method for handling V.8bis signals for modem connections over packet networks
What is claimed is: 1. A communication method for use by a first gateway device to communicate with ...


 Combined preamble detection and information method for burst-type digital communication system
The present invention comprises a combined synchronization and information transfer method and ...


 Signal synchronization method and receiver device for packet communication
It is therefore an object of the present invention to provide a signal synchronization method and a ...


 System and method for resolving fibre channel device addresses on a network using the device's fully qualified domain name
The present invention provides a system and method for discovering a fibre channel device in a ...


 Methods and apparatus for topology sensing in networks with mobile nodes
The present invention addresses the above mentioned issues by providing methodologies which allow ...


 Resource allocation mechanism in packet radio network
OF THE INVENTION According to a first embodiment of the invention, a network leaves (at least) one ...


 Method for variable block scheduling indication by an uplink state flag in a packet data communication system
The invention will now be described with respect to a GPRS system where a dynamic resource ...


 Method and apparatus for sharing uplink state flag (USF) with multiple uplink temporary block flows (TBFs)
The foregoing and other problems are overcome and the objects of the invention are realized by ...


 Method and system for fast access to an uplink channel in a mobile communications network
The present invention comprises a method and system for obtaining fast access to a multiplexed ...


 Mailbox registers for synchronizing header processing execution

Details
Inventors: Sindhu, Pradeep; Lim, Raymond M.; Libby, Jeffrey G.;
Assignee: Juniper Networks, Inc. (Sunnyvale, CA)
Primary Examiner: Pham; Chi
Assistant Examiner: Jain; Raj
Attorney, Agent or Firm: Harrity Snyder LLP

A packet header processing engine includes a level 2 (L2) header generation unit and a level 3 (L3) header generation unit. The L2 and L3 header generation units are implemented in parallel with one another. Mailbox registers allow the L2 and L3 header generation units to communicate with one another. The L2 header generation unit may write to a specified mailbox register only when a valid bit corresponding to the mailbox register indicates that the register does not contain valid data. After writing to the mailbox register, the L2 header generation unit changes the state of the valid bit. The L3 register then reads from the mailbox register and changes the state of the valid bit. A similar implementation of the mailbox registers allows data to flow from the L3 header generation unit to the L2 header generation unit.

DETAILED DESCRIPTION Systems and methods consistent with the principles of the invention, among other things, provide for an improved packet header processing engine.
One aspect consistent with the invention is directed to a packet header processing engine that comprises a number of elements.
In particular, the packet header processing engine includes a first packet processing unit configured to generate first packet header information relating to a packet header protocol and a second packet processing unit implemented in parallel with the first packet processing unit and configured to generate second packet header information relating to the packet header protocol.
A mailbox register allows the first packet processing and the second packet processing unit to communicate.
A second aspect consistent with the invention is a method that comprises receiving packet header information for a packet and generating, via a first packet processing engine, first protocol information for the packet based on the received packet header information.
Further, the method includes generating, via a second packet processing engine, second protocol information for the packet based on the received packet header information.
Information is transmitted from the first packet processing unit to the second packet processing unit through a first mailbox register.
Information is transmitted from the second packet processing unit to the first packet processing unit through a second mailbox register.
A third aspect consistent with the invention is directed to a network device for processing packets.
The network device includes a buffer configured to store the packets, including header data and payload data for the packets, and a descriptor reader component coupled to the buffer.
The descriptor reader component receives the header data for the packets stored in the buffer and looks up descriptor information relating to the received packet header data.
A packet header processing component is coupled to the descriptor reader component



Related patents
  Label-switching and control interface for asynchronous fast-packet switching
We claim: 1. A label-switching and control interface for fast packet switching, comprising: a plurality of bidirectional asynchronus multiplex lines forwarding ...
  Method of admission control and routing of virtual circuits
In accordance with the present invention it is recognized that the cost of routing a requested virtual circuit on links in a path through a network comprising a set of ...
  SONET add/drop multiplexer with packet over SONET capability
The present invention provides an apparatus and method for efficiently utilizing bandwidth within a SONET network carrying data packets such as Internet Protocol packets....
  Method of managing hop-count in label switching network and node apparatus
What is claimed is: 1. A method of managing a hop-count of a label switched path in a network, the label switched path being configured by a plurality of nodes for ...
  Optical internet protocol switch and method therefor
In view of the foregoing problems, drawbacks and disadvantages of the conventional systems and methods, an object of the present invention is to provide a system and ...
  Performance monitor system, transmission device and performance monitor method of transmission line
It is an object of the present invention to provide a novel transmission device with a performance monitoring function which readily and fully monitors the performance ...
  Communication method and communication equipment
In order to achieve an object of the present invention, there is provided a communication method employed in a communication system comprising a base station for ...
  Selectable differential or single-ended mode bus
Accordingly, the present invention is directed to a method and apparatus for configuring a bus as either a single-ended mode bus or as a differential mode bus, depending ...
  Multi-functional I/O buffers in a field programmable gate array (FPGA)
In accordance with the principles of the present invention, a multi-function I/O buffer in a programmable device comprises an enablable differential receiver, and an ...
  DTMF detection in internet telephony
The above and other problems in the prior art are overcome and a technical advance is achieved in accordance with the present invention which relates to a DTMF detector ...

0.014

Archive: All patents - Links

Copyright (c)2006 Eipa-patents.org - All rights reserved