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Details
Inventors: Takeuchi, Yusuke; Kokubo, Masaru; Yabuta, Keizo; Kenmoku, Atuko; Okado, Kazuo;
Assignee: Hitachi, Ltd. (Tokyo, JP)
Primary Examiner: Dwyer; James L.
Assistant Examiner: Fournier; Paul A.
Attorney, Agent or Firm: Antonelli, Terry, Stout & Kraus

A sending data buffer for holding sending data temporarily and transmitting the data to an echo canceler section is installed between a sending section and an echo canceler section of an echo canceler integrated circuit included in a subscriber line circuit of an integrated service digital network. The sending data buffer is operated in a shift register mode during a sending training mode, and operated in FIFO (first in-first out) mode during a sending/receiving training mode. Also, an adjustment function of the delay amount corresponding to the use setting is added.

DETAILED DESCRIPTION In the integrated service digital network, the training mode for getting the echo data is carried out prior to substantial data transmission.
When sending from the receiving station is stopped and the sending data are sent from the sending station to the receiving station, the training mode is composed of the sending training mode for extracting echo data of the sending data being reflected through the hybrid circuit and transmitted to the sending station, and the sending/receiving training mode for obtaining the optimum phase, that is, the optimum discriminating point of analog receiving signals, being sent from both the sending station and the receiving station.
In the echo canceler integrated circuit in the prior art as above described, sending data TD to form echo data are taken into an echo canceler section EC according to a receiving clock signal RXDC of the receiving section, as exemplified in FIG.
19.
In the sending training mode, however, there is no problem as phases of receiving clock signals RXDC are fixed to a prescribed value, but in the sending/receiving training mode where phases of receiving clock signals RXDC are changed, as phases of the receiving clock signal RXDC are different from those of the sending data TD, there occurs the case where the sending data TD are transmitted to the echo canceler section EC in overlapping or the echo canceler section EC misses the sending data.
Therefore, a problem occurs that time required for the training of a subscriber line circuit becomes longer resulting in the overtime in the worst case.
An object of the present invention is to prevent overlapping and missing of sending data at an echo canceler section such as an echo canceler integrated circuit.
Another object of the present invention is to shorten the training time of a subscriber line circuit including an echo canceler integrated circuit, and to prevent the overtime.
Still another object of the present invention is to prevent overlapping or missing of sending data in an echo canceler integrated circuit, and to attempt to expand the uses



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