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| Adaptive pre-equalizer for use in data communications equipment |
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| Transmission method and apparatus employing trellis-augmented precoding |
| The principles of the invention, which can be designated as "trellis-augmented preceding", will be ... |
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| Device and method for precoding data signals for PCM transmission |
| OF A PREFERRED EMBODIMENT There is first described below a technique for PCM downstream spectral ... |
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| Cell signal processing circuit and optical switch apparatus using the same |
| It is a principal object of the present invention to provide a cell signal processing circuit which ... |
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| System and method for implementing a universal service broker interchange mechanism |
| In an effort to overcome the above mentioned shortcomings, the present invention is based on the ... |
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Synchronizing signal detecting circuit
| Details |
Inventors: Lee, Doo Hee;
Assignee: LG Electronics Inc. (Seoul, KR)
Primary Examiner: Bocure; Tesfaldet
Assistant Examiner:
Attorney, Agent or Firm:
A synchronizing signal detecting circuit is disclosed. The sycnhronizing signal detecting circuit is characterized in that full matching or n mismatching is determined depending on a sub code area, a main data area, and the state of a system. Input data are compared with a predetermined synchronizing pattern and then a synchronizing signal is detected depending on the determined matching degree. As a result, since the synchronizing signal is detected, it is possible to minimize the missing synchronizing signal. The synchronizing signal detected in error is primarily removed using the window signal and the remaining synchronizing signal detected in error is finally removed by the error flag signal err_flag output as a result of ID ECC. Therefore, the actual synchronizing signal and the forcible synchronizing signal do not occur simultaneously, so that error detection of the synchronizing signal can be minimized. Furthermore, since the window area is varied depending on the state of the system, the sub code area, the main data area, each initial area of each area, and the other areas, it is possible to minimize the missing synchronizing signal. In addition, since the data are realigned and output in parallel, the accurate data can be output even if data slip occurs, thereby preventing error operation. |
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DETAILED DESCRIPTION Accordingly, the present invention is directed to a synchronizing signal detecting circuit that substantially obviates one or more of the problems due to limitations and disadvantages of the related art.
An object of the present invention is to provide a synchronizing signal detecting circuit for detecting a synchronizing signal by varying matching degree of a synchronizing signal pattern depending on the state of a system.
Another object of the present invention is to provide a synchronizing signal detecting circuit for designating in advance the position where a synchronizing signal will occur using a window and acknowledging only the synchronizing signal within the window as the synchronizing signal.
Other object of the present invention is to provide a synchronizing signal detecting circuit for detecting a synchronizing signal by varying a window area which designates in advance the position of the synchronizing signal.
Still another object of the present invention is to provide a synchronizing signal detecting circuit for acknowledging a final synchronizing signal only if identification (ID) is accurately detected in a synchronizing signal coming in next to the detected synchronizing signal.
Still other object of the present invention is to provide a synchronizing signal detecting circuit for converting input serial data to realigned parallel data and detecting a synchronizing signal so as to prevent erroneous operation from occurring due to clock inconsistency.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the invention.
The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
To achieve these and other advantages and in accordance with the purpose of the present invention, as embodied and broadly described, a synchronizing signal detecting circuit is characterized in that the state of a system is checked during reproducing data recorded in recording media, matching degree of a synchronizing signal pattern is determined depending on the state of the system, and a synchronizing signal is detected from input data in response to the determined matching degree
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