Flash analog-to-digital converter with logarithmic/linear threshold voltages
What is claimed: 1. In combination, a member provided with an electrically resistive material on one surface of the member, the member being defined by first and second side edges and top and bottom e... Read More
Inventors: Katzenstein, Henry S.;, Assignee: Brooktree Corporation (San Diego, CA) |
Traffic information radio signal receiver
I claim: 1. In a radio receiver having a radio signal receiving stage (10) providing program signals and traffic information signals, an audio stage providing audio output signals, a traffic informati... Read More
Inventors: Liman, Helmut;, Assignee: Blaupunkt-Werke GmbH (Hildesheim, DE) |
Method for dynamically allocating wireless communication resources
We claim: 1. In a TDM wireless communication system that includes a plurality of communication units, a plurality of wireless communication resources, and a central controller that allocates the plura... Read More
Inventors: Grube, Gary W.; Bunkenburg, Brian K.; Naddell, Marc C.;, Assignee: Motorola, Inc. (Schaumburg, IL) |
Scheduling mechanism for network adapter to minimize latency and guarantee background processing time
The present invention resides in a network adapter scheduling method, and corresponding apparatus, in which a polling loop includes receive data processing, and checking for background processing task... Read More
Inventors: Ramakrishnan, Kadangode K.; Sawyer, David; Weeks, Phillip J.; Washabaugh, Douglas M.;, Assignee: Digital Equipment Corp. (Maynard, MA) |
System for transferring portion of data to host from buffer if size of packet is greater than first threshold value but less than second threshold value
OF THE PREFERRED EMBODIMENT A method and apparatus for optimization of buffer memory management in a communications resource is described. In the following description, numerous specific details are ... Read More
Inventors: Cedros, Craig; Yaple, Nelson; Chalupsky, Dave; Martin, Phil;, Assignee: Intel Corporation (Santa Clara, CA) |
Processor with hierarchal memory and using meta-instructions for software control of loading, unloading and execution of machine instructions stored in the cache
Referring now to FIG. 1, there is shown a block diagram of a preferred embodiment of the programmable instruction cache in accordance with the present invention. The cache is implemented on a process... Read More
Inventors: Keith, John M.; Simon, Allen H.; Sprague, David L.; Dixon, Douglas F.; Goldstein, Judith A.;, Assignee: Intel Corporation (Santa Clara, CA) |
Input/output cache
It is therefore an object of the present invention to provide a system memory to input/output device interface which allows a central processor and input/output devices to access a shared memory area ... Read More
Inventors: Arimilli, Ravi K.; Dhawan, Sudhir; Nicholson, James O.; Siegel, David W.;, Assignee: International Business Machines Corporation (Armonk, NY) |
System and method for transmitting data from a server application to more than one client node
The invention relates to a system and method for transmitting the same data to more than one client node substantially simultaneously. In one embodiment the invention relates to a method for transmitt... Read More
Inventors: Pedersen, Bradley J.;, Assignee: Citrix Systems, Inc. (Fort Lauderdale, FL) |
Apparatus for delaying and recording time code signals
It is an object of the present invention to provide a time code signal recording circuit wherein necessary adjustment is performed not mechanically but electrically so that a relationship specified by... Read More
Inventors: Toyoshima, Makoto; Kanno, Hiroshi;, Assignee: Sony Corporation (Tokyo, JP) |
High-speed digital PLL device
An object of the present invention is to eliminate the above problems, and to provide a high-speed PLL device which operates correctly despite the aforementioned hazard which may occur, and further, w... Read More
Inventors: Nakamura, Seizo;, Assignee: Oki Electric Industry Co., Ltd. (Tokyo, JP) |
Magnetic disk storage apparatus with phase sync circuit having controllable response characteristic
In recent years, a technique has been proposed to write data with a predetermined constant linear recording density in a magnetic disk in order to improve the recording capacity of the magnetic disk a... Read More
Inventors: Hase, Kenichi; Miyazawa, Syoichi; Horita, Ryutaro; Kojima, Shinichi; Hirano, Akihiko; Uragami, Akira;, Assignee: Hitachi, Ltd. (Tokyo, JP) |
Method and apparatus for CT image registration
OF PREFERRED EMBODIMENTS As a step towards an accurate and clinically applicable registration, the use of a fiducial marker that can be used as a "ground truth" for evaluating registrations has been ... Read More
Inventors: Ellis, Randy E.;, Assignee: Queen's University at Kingston (Kingston, CA) |
Synchronization apparatus
In accordance with the present invention, there is now provided synchronization apparatus comprising a phase-locked loop for generating an output signal and for synchronizing the output signal to an i... Read More
Inventors: Jackson, Frederick S.; Henry, Michael D.; Leaver, David; Wright-Boulton, Neil;, Assignee: International Business Machines Corporation (Armonk, NY) |
Phase lock loss detector
What is claimed is: 1. A system for detecting phase lock loss between first and second two level signals S.sub.N and S.sub.R, of different ratios of high level portions to low level portions (duty cyc... Read More
Inventors: Guhn, Dewayne K.;, Assignee: RCA Corporation (New York, NY) |
CMOS pseudo-NMOS programmable capacitance time vernier and method of calibration
The present invention is directed to a time vernier providing fine timing control of an input signal having coarse timing edges. The time vernier comprises a receiving means for receiving a value repr... Read More
Inventors: Gutierrez, Jr., Alberto; Koerner, Christopher; Goto, Masaharu; Barnes, James O.;, Assignee: Hewlett-Packard Company (Palo Alto, CA) |
Low power, slew rate insensitive power-on reset circuit
The problems outlined above are in large part solved by the power-on reset circuit of the present invention. That is, power-on reset circuit hereof does not require a biasing current, or passive resis... Read More
Inventors: Ray, S. Doug; Peterson, Craig M.;, Assignee: Advanced Micro Devices, Inc. (Sunnyvale, CA) |
Programmable voltage controlled ring oscillator
We claim as our invention: 1. A programmable ring oscillator, comprising in combination: a first circuit section including first, second and third gates, a first input of said first gate being coupled... Read More
Inventors: Hausman, Kristen A.; Gaudenzi, Gene J.; Mosley, Joseph M.; Tempest, Susan L.;, Assignee: International Business Machines Corporation (Armonk, NY) |
Method and apparatus for phase-aligned multiple frequency synthesizer with synchronization window decoder
According to the present invention, an information handling system and method of operation thereof are provided which implement subsystems which operate at different clock frequencies and which transf... Read More
Inventors: Price, Warren E.; Uplinger, Kenneth A.;, Assignee: International Business Machines Corporation (Armonk, NY) |
Symmetrical waveform signal generator having coherent frequency shift capability
What is claimed is: 1. An apparatus for providing in response to a clocking signal one of a plurality of symmetrical waveform signals at predetermined different frequencies selectable according to cor... Read More
Inventors: Krupa, John E.; Magness, Preston L.; Brady, Thomas J.;, Assignee: RCA Corporation (New York, NY) |
Constant duty cycle, frequency programmable clock generator
Accordingly, it is an object of the present invention to provide an improved clock generator circuit which is frequency programmable and provides an output clock signal which exhibits a constant duty ... Read More
Inventors: LaMacchia, Michael P.;, Assignee: Motorola, Inc. (Schaumburg, IL) |
Peripheral control circuitry for personal computer
An object of the present invention is to provide a peripheral control circuit which can be incorporated into a personal computer system and is compatible with address bus and data bus architecture, as... Read More
Inventors: Keller, Glenn; Miner, Jay G.;, Assignee: Commodore-Amiga, Inc. (Los Gatos, CA) |
Programmable frequency divider
It is a general object of the present invention to provide a programmable frequency divider for use in PLLs (phase-locked loops), which is capable of dividing a higher input frequency directly into a ... Read More
Inventors: Yamashita, Kazuo;, Assignee: Nihon Musen Kabushiki Kaisha (Tokyo, JP) |
Variable frequency clock pulse generator for microcomputer
It is an object of the present invention to provide a clock pulse generator which features simple construction and cost, and which enables switching between high and low speed pulses without undesirab... Read More
Inventors: Watanabe, Nobuhisa;, Assignee: Sony Corporation (JP) |
Programmable multiphase clock divider
A programmable multiphase clock divider in accordance with one embodiment of the present invention includes a frequency divider and a clock generator for selectively frequency dividing a multiphase in... Read More
Inventors: Li, Gabriel; Hee, Wong;, Assignee: National Semiconductor Corporation (Santa Clara, CA) |
Circuit arrangement for an integrated data processing system composed of a small number of different chip types with all chips directly connectable to a common collecting bus
It is an object of the present invention to provide a family of a few integrated chips which can be combined in a simple manner into circuit arrangements for data processing systems of the most varied... Read More
Inventors: Weber, Gerald; Sorgenfrei, Jurgen;, Assignee: Olympia Werke AG (Wilhelmshaven, DT) |
Divertor target for magnetic containment device
An actively cooled target positioned in the divertor region of a tokamak or other plasma containment device comprises an array of swirl tubes arranged in a ladder configuration between input and outpu... Read More
Inventors: Luzzi, Jr., Theodore E.;, Assignee: The United States of America as represented by the United States (Washington, DC) |
Method of synchronizing a quadphase receiver and clock synchronization device for carrying out the method
What is claimed is: 1. A method for the clock synchronization of a receiver for demodulating a quadphase coded data signal, said data signal comprising data words consisting of first, second, third an... Read More
Inventors: de Jager, Frank; van Doorn, Rudolf A.; Verboom, Johannes V.; Carasso, Marino G.;, Assignee: U.S. Philips Corporation (New York, NY) |
Dual conversion GPS frequency converter and frequency plan for same
A GPS frequency conversion system according to the present invention provides a frequency plan having a spurious frequency response which necessitates minimal filtering. The instant frequency converte... Read More
Inventors: Shumaker, Paul K.; Casey, David D.; Burrell, Gary L.;, Assignee: Garmin Corporation (TW) |
System for calibration of a digital-to-analog converter
Accordingly, it is an object of the invention to provide a self-calibration circuit and method for a digital-to-analog converter which does not isolate the analog output terminal from an output operat... Read More
Inventors: Fowers, Paul;, Assignee: Burr-Brown Corporation (Tucson, AZ) |
Microwave amplifier generating distortion-reduced high output microwave power
Accordingly, it is an object of the present invention to provide a novel microwave amplifier free from the above problems. It is a further object of the present invention to provide a novel microwave ... Read More
Inventors: Takenaka, Isao;, Assignee: NEC Corporation (Tokyo, JP) |
Multiplexer-related 
