Modulator assemblies for vehicle hydraulic braking systems |
| I claim: 1. A modulator assembly for a vehicle anti-skid braking system comprising a housing having ... |
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Anti-wheel lock system for tandem axles |
| FIG. 1 discloses a preferred embodiment of the invention, wherein the speeds of four braked, ... |
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Air-cushion apparatus |
| OF THE INVENTION As shown in FIG. 1, an air-cushion apparatus according to the invention comprises ... |
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Rear axle suspension system for motor vehicles |
| I claim: 1. A suspension arrangement for suspending driven wheels of a motor vehicle, the ... |
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Engine automatic control system for vehicles |
| What is claimed is: 1. In an engine automatic control system for a vehicle having an ignition ... |
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Anti-pitch system for a motorcycle |
| In accordance with the present invention, there is provided an anti-pitch system for a motorcycle ... |
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Traction device for cross-country vehicles and machines |
| What we claim is: 1. A device for increasing the grip necessary for advancing a cross country ... |
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Heated air ducting structure for motor cycles |
| An object of the present invention is to provide a heated air ducting structure for motor cycles ... |
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Sense amplifier for integrated memory array |
| Having described preferred embodiments thereof, I claim as my invention: 1. In a memory array ... |
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Fast switching circuit
| Details |
Inventors: Bismarck, Otto H.;
Assignee: RCA Corporation (Princeton, NJ)
Primary Examiner:
Assistant Examiner:
Attorney, Agent or Firm:
First and second networks each comprised of two low-on-impedance transistors having their conduction paths connected in series are connected between first and second circuit outputs and a power terminal. In response to a signal transition of one polarity the two transistors of one network are momentarily turned-on to clamp its associated output to the power terminal. In response to a signal transition of opposite polarity the two transistors of the other network are momentarily turned-on to clamp its associated output to the power terminal. |
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DETAILED DESCRIPTION What is claimed is: 1. In a circuit in which first and second switching transistors driven by complementary input signals, have their conduction paths connected between first and second outputs, respectively, and a first power terminal, and in which relatively high impedance loads are connected between the outputs and a second power terminal, whereby the signals at said outputs tend to be unsymmetrical going from a second level, approximately equal to the voltage at said second power terminal, to a first level, approximately equal to the voltage at said first power terminal, much faster than from said first level to said second level, means for rendering the signal at said first and second outputs more symmetrical, comprising: first, second, third and fourth load transistors, each load transistor having a conduction path and a control electrode, and the load transistors when turned-on exhibiting a relatively low impedance along their conduction paths; means connecting the conduction paths of said first and second load transistors in series between said first output and said second power terminal; means connecting the conduction paths of said third and fourth load transistors in series between said second output and said second power terminal; means connecting the control electrode of said first load transistor to said second output and the control electrode of said third load transistor to said first output; and bistable means coupled between said first and second outputs and the control electrodes of said second and fourth load transistors responsive to the signal at said first output being at said first level for turning-off said fourth load transistor and turning-on said second load transistor and responsive to the signal at said second output being at said first level for turning-off said second load transistor and turning-on said fourth load transistor. 2. The circuit as claimed in claim 1 wherein said transistors are insulated-gate field-effect transistors 3. The circuit as claimed in claim 1 wherein said bistable means includes two cross coupled logic gates
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