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 Apparatus for testing integrated circuits

Details
Inventors: Buol, Douglas A.; Mize, Dean N.; Pattschull, John W.; Wallace, Robert M.;
Assignee: Texas Instruments Incorporated (Dallas, TX)
Primary Examiner:
Assistant Examiner:
Attorney, Agent or Firm:

A system for statically and dynamically testing an integrated circuit die in wafer form at various temperatures includes a multilayer support fixture in which the probes, the static test switching circuitry, and the dynamic test switching circuitry are mounted on separate, spaced apart, planar layers detachably connected to one another, the probe and the probe support board being formed of materials having a low temperature coefficient of thermal expansion. A heated/cooled wafer positioning chuck controls the temperature of the wafer thereon during static and dynamic testing.

DETAILED DESCRIPTION p Accordingly, the present invention overcomes these and other disadvantages by providing apparatus for statically and dynamically testing an integrated circuit die in wafer form at high and low temperatures.
In one embodiment of the invention a multiprobe test system includes a multilayer support fixture in which the probe, the static test switching circuitry, and the dynamic test switching circuitry are mounted on separate, spaced apart, planar boards detachably connected to one another, the probe, the probe support and the probe board being formed of materials having a low temperature coefficient of thermal expansion.
In another embodiment, the temperature of a wafer positioning chuck is controlled to raise and/or lower the temperature of the wafer of thereon during static and dynamic testing.
It is therefore an object of the present invention to provide a static and dynamic integrated circuit die test system having improved thermal and mechanical stability.
Another object of the present invention is to provide a test system including means for varying the temperature of a die in wafer form during static and dynamic testing.
Yet another object of the present invention is to provide a die test system that is readily adaptable to a variety of integrated circuits.



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