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Home Nonmetallic Processes Method-of-fabricating-two-level-interconnects-and-fuse-on-an-IC

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 Method of fabricating two level interconnects and fuse on an IC

Details
Inventors: Morcom, William R.; Berry, Kenneth A.;
Assignee: Harris Corporation (Melbourne, FL)
Primary Examiner: Weisstuch; Aaron
Assistant Examiner:
Attorney, Agent or Firm: Leitner, Palan, Martin & Bernstein

A method of forming fuses and two level interconnects including applying a layer of fusible material on an insulating layer and through contact apertures, cleaning said fusible layer by sputter etching, applying a layer of metallic material by sputtering, selectively patterning the metallic layer to form a top layer of contacts and interconnects and selectively patterning the fusible layer to form fusible elements and to form a bottom layer of contacts and interconnects.

DETAILED DESCRIPTION The present invention overcomes the problems of the prior art by providing a process incorporating the sputter etch techniques and applying the second layer of contact material at a low temperature.
After the standard formation of devices in an integrated circuit and of contact apertures through an insulating layer on the surface of the substrate, a nonselective high energy sputter etch is performed to clean the contact apertures.
Next a thin layer of fusible material is nonselectively applied across the insulating layer and into the contact areas.
A low energy sputter etch is then performed to remove impurities from the surface of the fusible layer.
A layer of metallic material is then applied over the layer of fusible material nonselectively.
The layer of metallic material is applied by a low temperature process, preferably sputtering.
The layer of metallic material is then patterned to form an interconnect.
Following this the fusible material is selectively patterned to yield the fuse links.
The resulting structure includes fusible elements and a two layer contact and interconnect system wherein the layers are coextensive.
OBJECTS OF THE INVENTION An object of the present invention is to provide a method of fabricating metal interconnects and fusible elements on an integrated circuit using sputter etching techniques to eliminate the cause of hillocks.
Another object is to provide a method of forming a two layer contact and interconnect having low contact resistance while preventing the formation of hillocks.
A further object of the invention is to provide a technique for forming low resistance contact between two layers of contact material wherein the second material is applied at low temperatures.
An even further object is to provide a method of forming an integrated circuit having thin film fuses using a low energy sputter etch in combination with a low temperature contact metal application.
Other objects, advantages, and novel features of the present invention will become apparent from the following detailed description of the invention when considered in conjunction with the accompanying drawings



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