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Home Nonmetallic Processes Method-of-making-integrated-CMOS-and-CTD-by-selective-implantation

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Details
Inventors: Aitken, Alan;
Assignee: Mitel Corporation (Kanata, CA)
Primary Examiner: Roy; Upendra
Assistant Examiner:
Attorney, Agent or Firm: Levine; Alan H.

A method of forming combination CMOS field effect transistors optionally with a charge transfer device in a single substrate. Different resistivities in the P type wells of the substrate are formed by a combination of masks; a high energy low dosage ion implantation of impurity passes through one mask but not the other, and a low energy high dosage ion implantation of the impurity is stopped by both masks. A significant number of fabrication steps is thus saved, and the devices so fabricated are threshold and field voltage compatible.

DETAILED DESCRIPTION I claim: 1.
A method of fabricating a semiconductor device comprising: (a) providing a semiconductor substrate containing one impurity polarity type, having a silicon nitride mask over its upper surface for defining field effect device channel regions and charge transfer device storage regions, and a photoresist mask which is open over predetermined portions of the silicon nitride mask and the substrate surface for defining field effect device and charge transfer device regions of similar polarity type, which is opposite to said one polarity type, (b) applying a low dosage high energy implantation of opposite polarity type impurity into regions of the substrate not covered by the photoresist mask sufficient to form high resistivity regions of the field effect and charge transfer devices, and using the same said masks (c) applying a high dosage low energy implantation of said opposite type impurity into regions of the substrate not covered by both said masks sufficient to form low resistivity regions of the field effect and charge transfer devices.
2.
A method of fabricating a semiconductor device comprising: (a) providing a semiconductor substrate containing one impurity polarity type, haing a silicon nitride mask over its upper surface for defining field effect device channel regions and charge transfer device storage regions, and a photoresist mask which is open over predetermined portions of the silicon nitride mask and the substrate surface for defining N channel field effect device and charge transfer device regions of similar polarity type, which is opposite to said one polarity type, (b) applying a low dosage high energy implantation of opposite polarity type impurity into regions of the substrate note covered by the photoresist mask sufficient to form field effect device channel regions and charge transfer device storage regions, and using the same said masks (c) applying a high dosage low energy implantation of said opposite type impurity into regions of the substrate not covered by both said masks sufficient to form said regions of similar polarity type having low resistivity



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