Low stress mounting of integrated optic chips

DETAILED DESCRIPTION We claim: 1.
Apparatus for enclosing an integrated optical IO device having an optical signal path fabricated in a crystalline chip of a thickness and crystallographic orientation selected to provide anisotropic thermal expansion in the principal plane of the optical signal path, comprising: a substrate comprising crystalline material having a similar crystallographic axes orientation and similar anisotropic coefficients of thermal expansion to those of the chip, and having substrate first and second mounting surfaces spaced apart at a substrate thickness, said substrate first mounting surface being adapted to receive the IO chip in bonded relationship thereto with mutual crystallographic orientation of the chip principal plane with said substrate first mounting surface; and package enclosure means having an enclosure mounting surface bonded to said substrate second mounting surface with a resilient adhesive.
2.
The apparatus of claim 1, wherein said substrate thickness is at least ten times greater than said chip selected thickness.
3.
The apparatus of claim 1, wherein said resilient adhesive is silicon rubber.
4.
The apparatus of claim 1, wherein said substrate material is LiNbO.
sub.
3 cut crystal.
5.
The apparatus of claim 1, wherein said substrate material is an anisotropic, graphite-aluminum composite material.
6.
The method of mounting, to an enclosure surface, an integrated optical (IO) device of the type having an optical signal path disposed on a crystalline chip having anisotropic thermal characteristics, comprising the steps of: determining the coefficients of thermal expansion of the chip and the orientation of the chip crystallographic axes in the principal plane of the optical signal path; providing a crystalline material substrate having a similar crystallographic axes orientation and similar anisotropic coefficients of thermal expansion to those of the chip, and having substrate first and second mounting surfaces spaced apart at a substrate thickness; fastening the chip to said substrate to provide mutual crystallographic orientation of the principal plane with said substrate first mounting surface; and bonding said substrate second mounting surface to the enclosure surface with a resilient adhesive