Adiabatic charging logic circuit

DETAILED DESCRIPTION The present invention has been made in consideration of the above situation, and has an object to provide a logic circuit which can efficiently implement adiabatic charging logic, and can decrease the cross-sectional area of each wire, thereby realizing reductions in power consumption of the circuit and circuit size.
In order to achieve the above object, according to the present invention, there is provided an adiabatic charging logic circuit comprising a logic circuit constituted by a plurality of logic elements, and a power supply section for supplying power to the logic circuit to cause the logic circuit to perform logic processing after an input signal is supplied to a gate of each of the logic elements, and stopping supply of the power before a new input signal is supplied to the gate of each of the logic elements after completion of the logic processing.