 Apparatus for receiving and decoding a broadcast signal |
| It is hence an object of the invention to process the data broadcast signal, and two pieces of main ... |
|
| System for network resource management |
| The present invention provides an improved system for network resource management. The present ... |
|
| Method and protocol for synchronized transfer-window based firewall traversal |
| In accordance with a preferred embodiment of the present invention, some of the problems associated ... |
|
| Bidirection data switch sequencing circuit |
| What is claimed is: 1. In a circuit having at least two port means for sending and receiving ... |
|
| Multiplexed synchronous/asynchronous data bus |
| Thus, one object of the present invention is to advantageously combine a self-clocking synchronous ... |
|
| Logic isolator with high transient immunity |
| The present invention includes a logic isolator with high transient immunity, for isolating digital ... |
|
| Adiabatic charging logic circuit |
| The present invention has been made in consideration of the above situation, and has an object to ... |
|
| Data processing system and apparatus and display system with image information memory control |
| An object of the present invention is to provide a data processing system and apparatus suitable ... |
|
| Display data write control device |
| The present invention has been proposed in consideration of the above problems, and the object ... |
|
|
Apparatus and method for interfacing between a communications channel and a processor for data transmission and reception
| Details |
Inventors: Sridhar, Manickam R.; Hoang, Minh; Wortman, Jr., John;
Assignee: Motorola, Inc. (Schaumburg, IL)
Primary Examiner: Woo; Stella
Assistant Examiner:
Attorney, Agent or Firm: Gamburd; Nancy R., Dichiara; Peter M.
An apparatus (101) and method for interfacing between a processor (103) and a communications channel (105), the processor operable in data terminal equipment (102) such as a computer having a communications application program, to provide for data transmission and reception over a communications channel (105), utilizing the computer processor without additional or redundant microprocessor or digital signal processor components. The apparatus and method provide for data transfer between the interface apparatus (101) and the communications channel (105) at a first, determinate frequency corresponding to a specific data transmission rate. The apparatus and method provide for data transfer between the interface apparatus (101) and the processor (103) at a second, indeterminate frequency, and provides for interim data storage in memory (115) between data transmission (or data reception) and data processing, such as modulation and demodulation, by the computer processor (103). The apparatus and method further provide for generating an interrupt signal to the processor to indicate the presence of received data for processing and the absence of digital data for transmission. |
|
DETAILED DESCRIPTION OF THE INVENTION As mentioned above, a significant difficulty which may be encountered in an actual implementation of a processor modem having a modem software application, concerns the differing rates or frequencies of data transmission compared to computer processing rates or frequencies.
These differing rates or frequencies may create a bottleneck-type problem which may not effectively utilize or optimize the available computer processing capability, with either too much data available from the processor for transmission (given the data transmission rate), or too little data available from the channel for subsequent processing (given the processing capability).
In the prior art, this problem did not arise, because at least one dedicated processor (in the DCD) processed incoming data, to directly create a complete file in memory in or accessible to the DTE, for subsequent processing by the second, dedicated computer processor.
Now, the apparatus and method of the present invention addresses this incompatibility issue when one processor is to perform both functions, simultaneously and in real time.
Secondly, as discussed in more detail below, the interface apparatus and method in accordance with the invention addresses and interfaces both the deterministic aspects of data transmission, and the more indeterminate aspects of computer processing, in order to simultaneously optimize the data transmission functions and other application functions of the computer processor.
For example, data transmission protocols, such as V.
34 and V.
32 bis, typically require specific and determinate transmission rates, with very deterministic sampling rates, to provide an accurate representation of the transmitted or received signal.
Conversely, a computer processor may be simultaneously operating several programs or functions, and each may have different processing requirements, resulting in the processor periodically working with each program at a more indeterminate frequency, such as at a frequency needed or specified by the user
|
|
Processing Data 
