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 Configuration memory for programmable logic device

Details
Inventors: Steele, Randy C.;
Assignee: SGS-Thomson Microelectronics, Inc. (Carrollton, TX)
Primary Examiner: Popek; Joseph A.
Assistant Examiner:
Attorney, Agent or Firm: Hill; Kenneth C., Jorgenson; Lisa K., Robinson; Richard K.

A programmable logic integrated circuit device utilizes volatile memory elements such as SRAM for retaining configuration information. A circuit is provided as part of the device for detecting loss of power on a supply input pin. When power loss is detected, a backup voltage supply, packaged with the programmable logic device as a unit, is connected thereto. The backup power is used to supply voltage only to those portions of the device having volatile memory elements containing configuration information. Backup power is not provided to input and output buffers of the device, thereby preventing excess loads being placed upon the backup device because of events which may occur external to the programmable logic device.

DETAILED DESCRIPTION It is therefore an object of the present invention to provide a programmable logic device which utilizes random access memory for performing logic functions.
It is a further object of the present invention to provide such a programmable logic device which will retain configuration information without requiring that power be applied to the integrated circuit device.
Therefore, according to the present invention, a programmable logic integrated circuit device utilizes volatile memory elements such as SRAM for retaining configuration information.
A circuit is provided as part of the device for detecting loss of power on a supply input pin.
When power loss is detected, a backup voltage supply, packaged with the programmable logic device as a unit, is connected thereto.
The backup power is used to supply voltage only to those portions of the device having volatile memory elements containing configuration information.
Backup power is not provided to input and output buffers of the device, thereby preventing excess loads being placed upon the backup device because of events which may occur external to the programmable logic device.



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