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Instruction buffer system for switching execution of current instruction to a branch or to a return from subroutine
| Details |
Inventors: Mori, Noriyasu; Tomita, Hiroshi;
Assignee: Hitachi, Ltd. (Tokyo, JP)
Primary Examiner: Lee; Thomas C.
Assistant Examiner: Mohamed; Agni
Attorney, Agent or Firm: Antonelli, Terry, Stout & Kraus
In an information processing system having an instruction buffer, an instruction buffer is controlled to primarily increase the instruction hit ratio of a sequence of instructions including a procedure-call instruction. In the first configuration, there is provided a mechanism which subdivides the instruction buffer into a plurality of instruction buffer banks so as to switch the instruction buffer bank to a current use in association with a dynamic procedure call, thereby improving the instruction hit ratio in the procedure call and in the return operation. In the second configuration, there are provided instruction words to subdivide and to control the instruction buffer such that the user can specify a method of controlling the instruction buffer. An instruction loop is captured efficiently and an arbitrary instruction sequence of a program is stored as a resident routine in the buffer so as to increase the instruction hit ratio. |
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DETAILED DESCRIPTION It is therefore an object of the present invention to efficiently control an instruction buffer for a branch operation of a program to increase the effectiveness of the instruction buffer for the program including a branch operation and a return operation without substantially increasing the capacity of the instruction buffer.
A branch target instruction buffer increases the processing speed of fetching an instruction in the execution of a branch operation.
However, if the branch target routine or the called routine to be executed after the execution of the branch has a large size, a sequence of instructions of the calling routine are replaced by prefetching the instruction sequence of the called routine.
As a result, when the calling routine is an instruction loop, it is sometimes impossible to capture an instruction loop which can be ordinarily captured, in case that the branch target instruction buffer is not used and the area in which the branch target instructions are buffered is included in the ordinary instruction buffer area.
In addition, in a case of a program, other than an instruction loop, where control is returned to the calling routine after a called routine is executed, if a replacement is achieved of an instruction (subsequent to a branch instruction) at a return address prefetched in the calling routine and in a sequence of instructions subsequent thereto, it is necessary in a return operation to read these instructions again from the main memory, which leads to loss of the effectiveness of the prefetch operation.
This problem cannot be satisfactorily solved only through an increase of the capacity of the instruction buffer without increasing the capacity to an extremely large size.
As a result, if the instruction buffer is large, a long period of time is required for an instruction retrieval such as for a check to determine a presence or absence of a predetermined instruction, which decreases the effectiveness of the instruction buffer.
According to one aspect of the present invention, the instruction buffer is subdivided into a plurality of regions which are controlled as an instruction buffer unit such that the instruction buffer operations of the instruction prefetch, replacement, and retrieval operations are independently accomplished in the respective regions
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Processing Data 
