Main memory system and checkpointing protocol for a fault-tolerant computer system using a read buffer

DETAILED DESCRIPTION Embodiments of the present invention provide a main memory device and a process for maintaining, in a computer system, a consistent, periodically-updated, checkpoint state in the computer system's main memory while allowing the use of conventional cache coherency protocols and non-blocking caches.
The main memory device is accessed through one or more logical ports.
The main memory contains a primary memory element and a checkpoint memory element which are both coupled to the port.
The primary memory element is accessed in the same way as a standard main memory.
The checkpoint memory element captures certain data accesses from the main memory which are detectable because the checkpoint memory element is connected to the same port as the primary memory element.
The checkpoint memory element may be a physically separate memory module from the primary memory element, or the checkpoint memory element and the primary memory element may reside within the same memory module at different addresses.
These captured accesses are then used to ensure the existence of a consistent checkpoint state in the main memory.
A computer system using such a main memory device and having the appropriate detection and circumvention procedures can recover from faults without loss of data integrity or processing continuity.
In a typical computer system, a processor and input/output elements are connected to a main memory.
The connection is typically provided by one or more memory buses, cross-point switches or other mechanisms.
The main memory has one or more logical ports through which all accesses to the main memory are made.
In one embodiment of the present invention, a computer system includes a main memory and a buffer memory.
The buffer memory is generally a last-in, first-out memory, or stack, that captures a pre-image of all data that is subsequently to be written back to the main memory of the computer system.
Checkpoints are periodically established in the main memory.
Data stored in the buffer memory is discarded after each checkpoint