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System and method for configuring an instrument to perform measurement functions utilizing conversion of graphical programs into hardware implementations
| Details |
Inventors: Kodosky, Jeffrey L.; Andrade, Hugo; Odom, Brian K.; Butler, Cary P.;
Assignee: National Instruments Corporation (Austin, TX)
Primary Examiner: Teska; Kevin J.
Assistant Examiner: Sergent; Douglas W.
Attorney, Agent or Firm: Conley, Rose & Tayon PC, Hood; Jeffrey C.
A system and method for configuring an instrument to perform measurement functions, wherein the instrument includes a programmable hardware element. A graphical program is first created, wherein the graphical program implements a measurement function. The graphical program may include a front panel and a block diagram. The method then generates a hardware description based on at least a portion of the graphical program. The hardware description describes a hardware implementation of the at least a portion of the graphical program. The method then configures the programmable hardware element in the instrument utilizing the hardware description to produce a configured hardware element. The configured hardware element thus implements a hardware implementation of the at least a portion of the graphical program. The instrument then acquires a signal from an external source, and the programmable hardware element in the instrument executes to perform the measurement function on the signal. The front panel may be used by a user to control the instrument during the measurement. |
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DETAILED DESCRIPTION The present invention comprises a computer-implemented system and method for automatically generating hardware level functionality, e.
g.
, programmable hardware or FPGAs, in response to a graphical program created by a user.
This provides the user the ability to develop or define instrument functionality using graphical programming techniques, while enabling the resulting program to operate directly in hardware.
The user first creates a graphical program which performs or represents the desired functionality.
The graphical program will typically include one or more modules or a hierarchy of sub-VIs.
In the preferred embodiment, the user places various constructs in portions of the graphical program to aid in conversion of these portions into hardware form.
The user then selects an option to convert the graphical program into executable form, wherein at least a portion of the graphical program is converted into a hardware implementation.
According to one embodiment of the present invention, the user can select which portions of modules are to be translated into hardware form, either during creation of the graphical program or when selecting the option to convert the graphical program into executable form.
Thus the user can select a first portion of the graphical program, preferably comprising the supervisory control and display portion of the program, to be compiled into machine language for execution on a CPU.
According to the present invention, the user can select a second portion of the graphical program which is desired for hardware implementation.
The portion of the graphical program selected for hardware implementation is first exported into a hardware description, such as a VHDL description.
The hardware description is then converted into a net list, preferably an FPGA-specific net list.
The hardware description is converted into a net list by a synthesis tool.
The net list is then compiled into a FPGA program file, also called a software bit stream.
In the preferred embodiment, the hardware description is directly converted into an FPGA program file
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Processing Data 
