Contact structure of an interconnection layer for a semiconductor device and a multilayer interconnection SRAM

DETAILED DESCRIPTION One object of the present invention is to provide an interconnection structure which enhances reliability of a multilayer interconnection structure including a contact portion having large steps.
Another object of the present invention is to provide an interconnection structure in which conductive regions of different conductivity types are connected to provide fine ohmic contact.
Another object of the present invention is to improve contact property of an interconnection arranged in a region having steps in a memory cell of an SRAM having a thin film transistor as a load.
Yet another object of the present invention is to improve patterning precision of an interconnection arranged in a region having steps in a memory cell of an SRAM having a thin film transistor as a load.
Still another object of the present invention is to provide a method of manufacturing an interconnection having an interconnection structure suitable for improving patterning precision of an interconnection arranged in a region having steps.
In one aspect of the present invention, a semiconductor device comprises a silicon layer and an interlevel insulating layer formed on a surface of the silicon layer and having a contact hole.
A silicon plug layer is embedded within the contact hole.
On the interlevel insulating layer, an interconnection layer of polycrystalline silicon is formed.
An intermediate conductive layer is formed between the interconnection layer and the surface of the silicon layer for decreasing a breakdown voltage of a pn junction portion therebetween.
The silicon plug layer is embedded within the contact hole, so that the interconnection layer arranged on the surface of the interlevel insulating layer is formed on the flat surface of the silicon plug layer even in a region of the contact hole.
Consequently, patterning precision of the interconnection layer is improved.
In case that silicon plug layer and the interconnection layer have different conductivity types, the intermediate conductive layer of refractory metal or the like is interposed between the silicon plug layer and the interconnection layer so that, the formation of pn junction is prevented or the breakdown voltage of the pn junction portion is reduced