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| Coating applicator with blade shaping |
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| Method for making an improved high voltage thin film transistor having a linear doping profile |
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| Method for making an improved high voltage thin film transistor having a linear doping profile |
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| OF THE EMBODIMENTS Referring now more particularly to the drawings, and to those embodiments of ... |
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| Spalling and corrosion resistant ceramic coating for land and marine combustion turbines |
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Etch method of cleaving semiconductor diode laser wafers
| Details |
Inventors: Woolhouse, Geoffrey R.; Huggins, Harold A.; Anderson, Stephen I.; Scholl, Frederick R.;
Assignee: Exxon Research & Engineering Co. (Florham Park, NJ)
Primary Examiner: Tupman; W. C.
Assistant Examiner:
Attorney, Agent or Firm: Collins; D. W., Purwin; P. E.
Double heterostructure (Al,Ga)As wafer comprising layers of gallium arsenide and aluminum gallium arsenide on a metallized n-GaAs substrate are separated into individual devices for use as diode lasers. In contrast to prior art techniques of mechanically cleaving the wafer in mutually orthogonal directions, the wafer is first separated into bars of diodes by a process which comprises (a) forming an array of exposed lines on the n-side by photolithography to define the lasing ends of the diodes, (b) etching through the exposed metallized portion to expose portions of the underlying n-GaAs, (c) etching into the n-GaAs substrate with a V-groove etchant to a distance of about 1 to 2 mils less than the total thickness of the wafer and (d) mechanically cleaving into bars of diodes. The cleaving may be done by prior art techniques using a knife, razor blade or tweezer edge or by attaching the side of the wafer opposite to the V-grooves to a flexible adhesive tape and rolling the assembly, such as over a tool of small radius. The diode bars may then, following passivation, be further cleaved into individual diodes by the prior art techniques of mechanically scribing and cleaving. Processing in accordance with the invention improves length definition and uniformity, increases device yields and reduces striations on lasing facets, as compared with prior art techniques. |
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DETAILED DESCRIPTION OF THE INVENTION The description that follows is given generally in terms of double heterostructure (DH) (Al,Ga)As diode lasers having a stripe geometry.
However, it will be appreciated that other configurations and other geometries of both gallium arsenide diode lasers, as well as other semiconductor diode lasers, may also be beneficially processed following the teachings herein.
Specific configurations of devices may generate coherent electromagnetic radiation in the UV, visible or IR regions.
FIGS.
1a and 1b depict a portion of a wafer, considerably enlarged for purposes of illustration, from which a plurality of DH diode lasers are to be fabricated.
FIG.
1a shows the wafer n-side down, while FIG.
1b shows the wafer p-side down.
The wafer includes an n-type GaAs substrate 10, on at least a portion of which are normally grown four successive layers 11, 12, 13 and 14, respectively, of n-(A1,Ga)As, p-GaAs, p-(A1,Ga)As and p-GaAs.
Layers 11 and 12 form a p-n junction region 15, with central areas 16 in layer 12 providing light-emitting areas.
The layers are conveniently formed one over the other in one run by liquid phase epitaxy, using conventional diffusion techniques and a horizontal sliding boat apparatus containing four melts, as is well-known.
Metal electrodes 17 in the form of stripes parallel to the intended direction of lasing are deposited through conventional photolithography techniques onto top layer 14 and provide means for external contact.
A metal layer 18 is deposited on at least a portion of the bottom of the substrate 10.
Gold pads 19, somewhat smaller in area than the intended device, are formed on layer 18, and provide means for external contact.
When cleaved into individual devices, as shown by dotted lines 20, planar mirror facets are formed along (110) planes.
When current above a threshold value from a battery 21 is sent through a selected electrode 17, light L is emitted from the facet on the p-n junction 16, such p-n junction lying in a plane that is perpendicular to the direction of current flow from electrode 17 to electrode 18
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Quantum Computing 
