Home | Links | Contact Us | More About Intellectual Property | Bookmark
Search patents:
Home Quantum Computing Method-for-dry-etching-vias-in-integrated-circuit-layers

 Photopolymerization co-initiator systems
What is claimed is: 1. A photopolymerization co-initiator system which consists essentially of (a) ...


 Photosensitive resin composition containing pullulan or esters thereof
What is claimed is: 1. A photosensitive resin composition comprising 30 to 90 parts by weight of at ...


 Acyl benzyl ethers
What is claimed is: 1. A compound of the formula ##SPC4## where R.sub.1 and R.sub.2 each ...


 Photographic supports and elements utilizing photobleachable omicron-nitroarylidene dyes
I claim: 1. A process for preparing a photographic image which comprises imagewise exposing to ...


 Photo-imaging utilizing alkali-activated photopolymerizable compositions
What is claimed is: 1. The method of forming a polymeric image which comprises: a. providing photo-...


 Photopolymerizable compounds and compositions comprising the product of the reaction of a monomeric ester and a polycarboxy-substituted benzophenone
What is claimed is: 1. A photopolymerizable compound comprising the product of the reaction of (1) ...


 Stabilization of photosensitive recording material
We claim: 1. A recording process including image stabilization comprising the steps of: 1. image-...


 Photopolymerization using an alpha-aminoacetophenone
I claim as my invention: 1. In a process for the photopolymerization of a polymerizable monomer ...


 Substituted (4-carboxyphenoxy) phenyl alkane compounds
We claim: 1. A compound of the formula: ##STR34## wherein R.sub.1 is a C.sub.1 to C.sub.7 alkyl ...


 Method for desensitization of a color developer
OF THE INVENTION According to the process of this invention, drying at the time of desensitization ...


 Method for dry etching vias in integrated circuit layers

Details
Inventors: Elkind, Jerome L.; Smith, Patricia B.; Hutchins, Larry D.; Luttmer, Joseph D.; York, Rudy L.; England, Julie S.;
Assignee: Texas Instruments Incorporated (Dallas, TX)
Primary Examiner: Hearn; Brian E.
Assistant Examiner: Everhart; B.
Attorney, Agent or Firm: Grossman; Rene E., Sharp; Melvin

A process is disclosed through which vias (50) can be formed by the reaction of an etchant species (52) with a mercury cadmium telluride (HgCdTe) or zinc sulfide (ZnS) layer (42). The activating gases (20) are preferably a hydrogen gas or a methane gas which is excited in a diode plasma reactor (100) which has an RF power source (13) applied to one of two parallel electrodes. The etching occurs in selected areas in a photoresist pattern (44) residing over the ZnS or HgCdTe layer (42). Wet etching the layer (42) with a wet etchant (54) following the dry etching, improves the via (50) by making the walls (48) smoother, and allowing for expansion of the vias (50) to a dimension necessary for proper operation of a HgCdTe-based infrared detector.

DETAILED DESCRIPTION OF THE DRAWINGS Referring to FIG.
1, a schematic representation of an etching apparatus according to the present invention is shown and is generally designated 100.
Apparatus 100 is more commonly known as a diode plasma reactor.
A reactor chamber or vessel for use with the present invention is preferably capable of maintaining an internal pressure between approximately 0.
01 to 10 torr and an internal wafer temperature of between approximately 15 degrees to 130 degrees centigrade.
An RF powered electrode 12 is connected to an RF power source 13, which can, for example, generate 150 watts at 13.
56 megahertz.
Vessel 10 further includes a ground or substrate electrode 16.
For the etching step of the invention, the distance between the electrode 12 and the electrode 16 should be maintained in a range of approximately 2 to 6 inches, and is preferably approximately 4 inches.
A plasma 17 is formed between electrodes 12 and 16 and is in contact with wafer 19 on which material such as a CdTe layer, HgCdTe layer or a ZnS layer has been deposited.
Subsequent disclosure will discern the distinctions between operating parameters when using the HgCdTe layer versus the ZnS layer formed on wafer.
An inlet 18 to vessel 14 introduces the gas etchant into chamber 10.
In the preferred embodiment, the gas etchant comprises hydrogen or a hydrocarbon, preferably methane or ethane.
This etchant originates from the active-gas source 20.
Additionally, an inert gas source 22 can be mixed with the re-active gas source 20 in accordance with the present invention.
Inert gas 22 can comprise helium, argon, neon, or a combination thereof.
Valves 24, 26, and 28 are operated to control the relative flows of the gases from sources 20 and 22.
Active gas source 20 is initially brought through valves 24 and 28 into a mixing chamber 30.
A separate amount of inert gas 22 is released through valve 26 into the mixing chamber 30.
As mixed, the gas etchant species proceeds through a valve 32 to chamber 14, where the gas is activated through excitation by radio frequency (RF) energy from source 13 to produce the plasma 17



Related patents
  Process for forming a buried drain or collector region in monolithic semiconductor devices
The process in accordance with the invention aims at overcoming the above drawbacks. A first innovative process embodiment comprises the following steps: growing on a ...
  Golf ball
OF THE INVENTION The present invention is directed to improved core construction and several methods for improving core construction. Broadly, the golf ball core of the ...
  Optoelectronic switching and display device with porous silicon
It is a principal object of the present invention to overcome the above shortcomings by providing a solid state optoelectronic switching and display device for high ...
  Method of forming porous silicon
It is an object of the present invention to provide a process for manufacturing porous silicon having a high degree of uniformity. Another object of the invention is to ...
  Lightweight neutron detector
What is claimed is: 1. In a neutron detector including a metallic encasement containing a neutron detecting gas and further including a moderator material disposed on ...
  Method of forming a salicided self-aligned metal oxide semiconductor device using a disposable silicon nitride spacer
A method of fabricating a SALICIDED complementary metal oxide semiconductor utilizing a very thin oxide spacer and a disposable nitride layer is disclosed. The method of ...
  Method of fabricating semiconductor devices and integrated circuits using sidewall spacer technology
In accordance with one aspect of the invention, the base layer of sidewall spacer of a semiconductor device or integrated circuit comprises a composite multi-layered ...
  Structure and method for manufacturing improved FETs having T-shaped gates
In view of the above, the invention is to provide a structure and method for manufacturing improved FETs having T-shaped gates which not only decrease the parasitic ...
  Method of fabricating a self-aligned silicide MOSFET
It is therefore an object of the invention to provide a reverse T-gate MOSFET device. The T-gate device possesses a wide, shallow junction to protect the device from the ...
  Partial silicidation method to form shallow source/drain junctions
This invention relates generally to semiconductor technology and more particularly to the formation of silicided electrodes in active semiconductor devices, such as MOS ...

0.014

Archive: All patents - Links

Copyright (c)2006 Eipa-patents.org - All rights reserved