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 Method for forming ultra fine deep dielectric isolation

Details
Inventors: Venkataraman, Krishnamur; Yun, Bob H.;
Assignee: International Business Machines Corporation (Armonk, NY)
Primary Examiner: Massie; Jerome W.
Assistant Examiner:
Attorney, Agent or Firm: Saile; George O.

A method is shown for forming ultra fine, deep dielectric isolation in a silicon body. The method involves forming a first layer of material on the silicon body over a first set of alternately designated device regions. A conformal coating is deposited over the first layer and on the silicon body included in a second set of alternately designated device regions and the designated isolation regions. The thickness of the conformal coating is chosen to be substantially the width of the planned isolation between device regions. A second layer is then deposited over the conformal coating. The first layer and conformal coating are composed of different materials. The topmost surface comprising of the second layer and the conformal coating is planarized by removing partially the second layer and conformal coating from the first layer wherein the second set of alternately designated device regions in the silicon body are covered by the conformal coating and the second layer with portions of the conformal coating separating the covers for the first and second set of device regions. The portions of the conformal coating separating the covers are removed down to the silicon body over the designated isolation regions. A groove is then etched in the silicon body using the covers as the etch mask. The groove is etched to the desired depth of the dielectric isolation in the designated isolation regions and then is filled typically by thermal oxidation.

DETAILED DESCRIPTION In accordance with the present invention, a method is described for the formation of ultra fine grooves that can be filled with dielectric material which can then act as dielectric isolation for highly dense integrated circuit devices.
This method is accomplished by first forming a first layer of material on the silicon body wherein the dielectric isolation is desired.
The layer material is formed over a first set of alternately designated device regions with bare silicon therebetween.
A conformal coating is deposited over the first layer and on the silicon body included in a second set of alternately designated device regions and the designated isolation regions.
The thickness of the coating is made to be substantially the width of the planned dielectric isolation.
A second layer is then deposited over the conformal coating.
The first layer and the conformal coating are composed of different materials.
The topmost surface of the second layer and the conformal coating are planarized by removing partially the second layer and conformal coating from the first layer wherein the second set of alternately designated device regions in the silicon body are covered by the conformal coating and the second layer with portions of the conformal coating separating the covers for the first and second sets of device regions.
The vertical portions of the conformal coating separating the covers are then removed down to the silicon body in the designated isolation regions.
These covers are then used as an etch mask for a etching of grooves in the silicon body to the desired depth of the dielectric isolation.
The grooves are then filled with dielectric material to form the dielectric isolation.
The preferred method of filling the grooves is by a thermal oxidation process.



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