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Method for suppressing boron penetration in PMOS with nitridized polysilicon gate
| Details |
Inventors: Lin, Yung-Hao; Lai, Chao-Sung; Lee, Chung-Len; Lei, Tan-Fu;
Assignee: National Science Council (Taipei, TW)
Primary Examiner: Thomas; Tom
Assistant Examiner: Mulpuri; S.
Attorney, Agent or Firm: Frost & Jacobs
A method for suppressing boron penetration in a PMOS with a nitridized polysilicon gate includes steps of 1) growing a layer of gate oxide on a substrate, 2) forming at least one first polysilicon layer on the gate oxide layer, 3) nitridizing the first polysilicon layer, 4) forming a second polysilicon layer on the first polysilicon layer; and 5) implanting B-containing ions into the first and second polysilicon layers for constructing a PMOS structure wherein the nitridizing step suppresses a boron ion from penetration into the substrate. The present invention is characterized in nitridation on a polysilicon gate instead of a gate oxide which can effectively suppress boron penetration, avoid drawbacks resulting from nitridizing a gate oxide, and moreover, improve the reliability of the device owing to the slight nitridation effect in the polysilicon gate and the gate oxide. |
|
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT Referring to FIG.
1, a preferred embodiment according to the present invention includes the following steps: 1) in a condition that rates of O.
sub.
2 volume over time and N.
sub.
2 volume over time are in a ratio of 1:6, growing a 80.
ANG.
layer of gate oxide 2 at 900.
degree.
C.
for 80 minutes on top of an n-type (1,0,0) Si substrate 1 with a resistor of 5-10 .
OMEGA.
/cm.
sup.
2, as shown in FIG.
1A; 2) forming two layers of the first polysilicon 3, both having a thickness of 1000.
ANG.
, at 625.
degree.
C.
in a LPCVD system (as shown in FIG.
1B); 3) nitridizing the first polysilicon 3 with NH.
sub.
3 at pressure of 120 mtorr and temperature of 900.
degree.
removing with diluted HF a nitridized silicon layer (not shown) formed during the period of nitridation, in which after the nitridation, many nitrogen atoms are distributed above the first polysilicon 3 (as shown in FIG.
1C); 4) growing a second polysilicon 5 having a thickness of 1000.
ANG.
at 625.
degree.
C.
in a LPCVD system; 5) implanting BF.
sub.
2.
sup.
+ ions into those layers of polysilicon with an implanting energy of 50 Kev and the implanting ion dosage of 5.
times.
10.
sup.
15 number/cm.
sup.
2, as shown in FIG.
1D; 6) annealing in O.
sub.
2 at 800.
degree.
C.
for 30 minutes to form a layer of polysilicon oxide 6 on top of the second polysilicon 5 for preventing BF.
sub.
2.
sup.
+ ions from spreading out which thereby increases the resistor of the polysilicon gate in the subsequent N.
sub.
2 -annealing procedure; 7) annealing in N.
sub.
2 at 900.
degree.
C.
respectively for 10 minutes, 20 minutes, 30 minutes, and 40 minutes, by which the effect of suppressing boron penetration is discussed; 8) removing with diluted HF the polysilicon oxide layer 6 formed in the O.
sub.
2 annealing step; and 9) depositing a layer of Al 7 having a thickness of 4000.
ANG.
which then is annealed in N.
sub.
2 at 400.
degree.
C.
for 30 minutes.
Then a positive photoresistor is formed and exposed to generate a device pattern outside of which, the Al 7 and those polysilicon layers are etched by a chemical solution
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