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Home Quantum Computing PROCESS-FOR-FORMING-THIN-GATE-OXIDE-WITH-ENHANCED-RELIABILITY-BY-NITRIDATION-OF-UPPER-SURFACE-OF-GATE-OF-OXIDE-TO-FORM-BARRIER-OF-NITROGEN-ATOMS-IN-UPPER-SURFACE-REGION-OF-GATE-OXIDE-AND-RESULTING-PRODUCT

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 PROCESS FOR FORMING THIN GATE OXIDE WITH ENHANCED RELIABILITY BY NITRIDATION OF UPPER SURFACE OF GATE OF OXIDE TO FORM BARRIER OF NITROGEN ATOMS IN UPPER SURFACE REGION OF GATE OXIDE, AND RESULTING PRODUCT

Details
Inventors: Aronowitz, Sheldon; Haywood, John; Kimball, James P.; Puchner, Helmut; Kapre, Ravindra Manohar; Eib, Nicholas;
Assignee: LSI Logic Corporation (Milpitas, CA)
Primary Examiner: Lee; Eddie
Assistant Examiner: Diaz; Jose R
Attorney, Agent or Firm: Taylor; John

A process for inhibiting the passage of dopant from a gate electrode into a thin gate oxide comprises nitridation of the upper surface of the thin gate oxide, prior to formation of the gate electrode over the gate oxide, to thereby form a barrier of nitrogen atoms in the upper surface region of the gate oxide adjacent the interface between the gate oxide and the gate electrode to inhibit passage of dopant atoms from the gate electrode into the thin gate oxide during annealing of the structure. In one embodiment, a selective portion of silicon oxide on a silicon substrate may be etched to thin the oxide to the desired thickness using a nitrogen plasma with a bias applied to the silicon substrate. Nitridation of the surface of the etched silicon oxide is then carried out in the same apparatus by removing the bias from the silicon substrate.

DETAILED DESCRIPTION The invention comprises a process for inhibiting the passage of dopant from a thin polysilicon gate electrode into a thin gate oxide beneath the gate electrode, and thereby also inhibiting the further passage of such dopant through the thin gate oxide into the channel region of a silicon substrate beneath the gate oxide.
The process comprises nitridation of the upper surface region of the thin gate oxide prior to formation of the thin polysilicon gate electrode over the nitridated surface of the gate oxide to thereby form a barrier of nitrogen atoms in the upper surface region of the gate oxide adjacent the interface between the gate electrode and the gate oxide to inhibit passage of dopant atoms in the polysilicon gate electrode into the gate oxide, or through the gate oxide into the channel region of the silicon substrate beneath the gate oxide during subsequent annealing of the structure.
In one embodiment, a thin gate oxide is first formed over the silicon substrate by implanting nitrogen atoms into the surface of the silicon substrate in the region where the silicon oxide will be formed over.
Subsequent growth of a silicon oxide layer will result in the formation of thin silicon oxide in the nitrogen-implanted surface region of the silicon substrate.
At least some of the implanted nitrogen atoms in the silicon substrate surface will then be incorporated into the thin gate oxide to thereby supplement the dopant barrier formed by the nitrogen atoms present in the upper surface region of the gate oxide layer due to the nitridation step of the invention.
In another embodiment, a selective portion of a silicon oxide layer on a silicon substrate may be selectively etched to thin the oxide to the desired thickness for a subsequently formed gate oxide.
Such etching of the silicon oxide may be carried out using a nitrogen plasma with a bias applied to the silicon substrate, in which case nitridation of the surface of the etched silicon oxide may be carried out in the same apparatus, after the desired thickness of the silicon oxide layer is achieved, by removing the bias from the silicon substrate



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