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 Planar epitaxial refill using liquid phase epitaxy

Details
Inventors: Baliga, Bantval J.; Gidley, Gerald B.;
Assignee: General Electric Company (Schenectady, NY)
Primary Examiner: Ozaki; G.
Assistant Examiner:
Attorney, Agent or Firm: Snyder; Marvin, Davis; James C.

Planar silicon device structures are fabricated by refilling grooves etched in an oxide-coated silicon substrate using liquid phase epitaxial growth from a tin melt. Since tin does not wet silicon dioxide, silicon nucleation on the oxide-covered areas of the substrate is precluded. Consequently, epitaxial growth selectively occurs in the grooves, without undesirable silicon growth over the oxide. This avoids the short-circuits and surface nonplanarity resulting from the growth of polycrystalline silicon on the oxide layer covering the unetched areas when vapor phase epitaxial growth is employed.

DETAILED DESCRIPTION We claim: 1.
A method of refilling grooves in a silicon wafer of predetermined conductivity type by epitaxial growth of silicon from the liquid phase, comprising: establishing an oxide layer on a surface of said silicon wafer; etching grooves extending into said wafer through said oxide layer; inserting said wafer into a melt at least saturated with silicon and containing conductivity type-determining impurities; cooling the melt at a controlled rate so as to fill the grooves with epitaxially-grown silicon to a desired extent; and withdrawing said wafer from said melt upon termination of said cooling.
2.
The method of claim 1 wherein said cooling is terminated when the grooves in said silicon wafer are filled with epitaxially-grown silicon up to the surface of said silicon wafer.
3.
The method of claim 2 including the step of removing said oxide layer from said wafer after said wafer is withdrawn from said melt.
4.
The method of claim 5 including the step of diffusing impurities into the ungrooved surface portion of said wafer previously covered by said oxide layer so as to electrically interconnect successive filled grooves containing epitaxially grown silicon.
5.
The method of claim 1 wherein said cooling is terminated when the grooves in said silicon wafer are filled with epitaxially-grown silicon to a level below the surface of said silicon wafer.
6.
The method of claim 1 wherein said cooling is terminated when the grooves in ssaid silicon wafer are filled with epitaxially-grown silicon to a level above the surface of said silicon wafer.
7.
The method of claim 1 wherein said melt is supersaturated with silicon.
8.
The method of claim 7 wherein said cooling is terminated when the grooves in said silicon wafer are filled with epitaxially-grown silicon up to the surface of said silicon wafer.
9.
The method of claim 8 including the step of removing said oxide layer from said wafer after said wafer is withdrawn from said melt.
10.
The method of claim 9 including the step of diffusing impurities into the ungrooved surface portion of said wafer previously covered by said oxide layer so as to electrically interconnect successive filled grooves containing epitaxially-grown silicon



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