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Details
Inventors: Breiten, Charles P.; Stanasolovich, David; Theisen, Jacob F.;
Assignee: International Business Machines Corporation (Armonk, NY)
Primary Examiner: Powell; William A.
Assistant Examiner:
Attorney, Agent or Firm: LaBaw; Jeffrey S., Redmond, Jr.; Joseph C.

A method of planarizing wide dielectric filled isolation trenches formed in the surface of a semiconductor surface is described. A self aligned mask is formed on the thick conformal layer of dielectric in the depressions over the wide trenches to protect the dielectric in those trenches from etching during planarization steps. The mask material is chosen to have etch characteristics different from the dielectric layer and a subsequent planarizing organic layer to allow selective etching of the mask material or dielectric without etching the other materials in the structure.

DETAILED DESCRIPTION It is a primary object of this invention to provide an improved method for planarizing wide dielectric filled trenches in the surface of a semiconductor substrate.
It is another object of this invention to provide a self aligned method for planarizing wide dielectric filled trenches.
It is a further object of this invention to provide a method which uses highly selective etches, thereby reducing the process sensitivity to endpoint control and increasing process windows It is yet another object of this invention to provide a method which does not require expensive and time consuming photolithographic techniques to planarize a wide dielectrically filled trench.
These and other objects are accomplished by forming a series of a wide and narrow trenches in the surface of a semiconductor surface using known etching techniques.
A first layer of dielectric is conformally deposited over the pattern of wide and narrow trenches in the semiconductor surface.
A second layer, preferably of a different dielectric material, is then deposited over the first dielectric.
Next, a thick organic layer such as photoresist or polyimide is applied to further planarize the structure.
The second layer must be chosen to have sufficiently different etch characteristics from the first layer and the organic layer so that it can function as a etch mask for the first dielectric layer.
The organic layer is then etched back to the surface of the second layer above the device areas and the narrow trenches.
At this point, some organic material is still left in the depressions above the wide trenches.
The second layer is then etched in the areas where it is exposed to form an etch mask protecting the wide trench areas.
The first dielectric layer is then exposed in the device and the narrow trench areas.
It is then etched with high selectivity to the second layer until endpoint is determined at the semiconductor surface.
The masking portions of the second layer are then removed with an etching step or other means



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