Semiconductor device for minimizing diffusion of conductivity enhancing impurities from one region of a polysilicon layer to another

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS This disclosure of the invention is submitted in furtherance of the constitutional purposes of the Patent Laws "to promote the progress of science and useful arts" (Article I, Section 8).
According to one aspect of the invention, a method for minimizing diffusion of conductivity enhancing impurities from one region of a wafer into another region comprises the steps of: providing a polysilicon layer having a first impurity, the first impurity being of a first conductivity type and being provided to a first concentration; masking a first selected portion of the polysilicon layer; providing a second impurity into unmasked regions of the polysilicon layer to a second concentration; masking a second selected portion of the polysilicon layer adjacent the first selected portion; and providing a third impurity of a second conductivity type into unmasked regions of the polysilicon layer to a third concentration to define a diffusion barrier region between first conductivity type polysilicon and second conductivity type polysilicon, the diffusion barrier region restricting cross diffusion of the first and second conductivity type impurity within the polysilicon layer.
The preferred second impurity is one or more of nitrogen, oxygen, or germanium.
Preferably, the first conductivity type is a p-type conductivity and the second conductivity type is an n-type conductivity.
The diffusion barrier region preferably has a width ranging from approximately 500 to approximately 3000 Angstroms.
According to another aspect of the invention, a method of forming a back-to-back diode resistor for an SRAM comprises the steps of: providing a polysilicon layer having a p-type impurity; masking the polysilicon layer to define a p-type region; providing a diffusion inhibiting impurity into unmasked regions of the polysilicon layer; masking the polysilicon layer to define two diffusion barrier regions adjacent to, and on opposite sides of, the p-type region; and providing an n-type impurity into unmasked regions of the polysilicon layer to produce two n-type regions adjacent respective ones of the diffusion barrier regions, the diffusion barrier regions restricting cross diffusion of the p-type and n-type impurities within the polysilicon layer