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| Planar optical scanning head having deficiency-correcting grating |
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| Electrical and fiber-optic connector |
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| Metal silicide texturizing technique |
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| Method for production of SOI transistor device having a storage cell |
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| Planar waveguides |
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| Semiconductor integrated circuit arrangement fabrication method |
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Semiconductor integrated circuit with photo diode
| Details |
Inventors: Mita, Keizi; Takahashi, Tsuyoshi; Ohkoda, Toshiyuki; Takada, Tadayoshi;
Assignee: Sanyo Electric Co., Ltd. (Moriguchi, JP)
Primary Examiner: Hille; Rolf
Assistant Examiner: Tran; Minhloan
Attorney, Agent or Firm: Morrison; Thomas R.
An optical semiconductor is integrated with a transistor by epitaxially growing a lightly doped epitaxial layer on a substrate. One isolated island area of the epitaxial layer contains a diffusion area on its surface to form the optical semiconductor. A second isolated island area has its conductivity type inverted by a buried layer that is diffused upward into contact with a surface layer that is diffused downward. The upward-diffused and downward-diffused layers unite to form a collector of the transistor. A base area in the surface of the collector contains an emitter in its surface. The emitter and the diffusion area are formed of the same material, and in the same process steps. |
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DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Referring to FIG.
1 a photo diode 11 and an NPN transistor 12 are formed on a common P-type single crystal silicon semiconductor substrate 13.
Substrate 13 is doped to a resistivity of about 40 to 60 ohm-cm.
A P.
sup.
- -type epitaxial area 14, having a thickness of 10 to 12 microns, is formed on substrate 13 by epitaxial vapor growth.
Epitaxial area 14 is grown epitaxially intrinsic silicon, but is very lightly autodoped from by P-type impurities from substrate 13 to a P.
sup.
- condition.
Because of the very light doping, a center region of epitaxial area 14 has a relatively high resistivity of about 200 to 1500 ohm-cm.
An upper surface of P.
sup.
- -type epitaxial area 14 contains a first island area 16 for forming photo diode 11 completely surrounded by a P.
sup.
+ -type separating area 15 extending completely through epitaxial area 14 from its upper surface to substrate 13.
A second island area 17 for forming NPN transistor 12 is similarly defined by P.
sup.
+ -type separating area 15.
Photo diode 11, which receives optical input signals, is formed on first island area 16 by an N.
sup.
+ -type diffusion area 18 which covers most of the top surface of first island area 16.
Thus, N.
sup.
+ -type diffusion area 18 forms a large-area PN junction with first island area 16.
The diffusion depth of N.
sup.
+ -type diffusion area 18 is from about 0.
8 to 1.
0 micron.
An electrode 27, contacting P.
sup.
+ -type separating area 15, serves as the second electrode for photo diode 11.
Due to the high level of doping, N.
sup.
+ -type diffusion area 18 has a low resistivity of about 10 to 20 ohms.
Referring to FIG.
10, a plot of resistivity versus vertical position through island 16 is shown.
Beginning at the left of the figure, the resistivity in N.
sup.
+ -type diffusion area 18 is about 0.
003 ohm-cm, increasing slightly as it approaches the interface with epitaxial area 16.
The upper part of epitaxial area 16, near the left of the figure, exhibits a relatively low resistivity, due to diffusion of N-type impurities thereinto from diffusion area 18
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