Integrated semiconductor package
The present invention is an integrated semiconductor package comprising a semiconductor body having a first surface and plurality of pins, each pin having first and second ends. The present invention ... Read More
Inventors: Mones, Arthur H.; Sheehy, Xavier; Spielberger, Richard K.;, Assignee: Atmel Corporation (San Jose, CA) |
Optical wavelength conversion method and laser-diode-pumped solid-state laser
I claim: 1. A method of converting the wavelengths of two linearly polarized fundamental waves applied to a bulk single crystal of a nonlinear optical material represented by the following molecular d... Read More
Inventors: Okazaki, Yoji;, Assignee: Fuji Photo Film Co., Ltd. (Kanagawa, JP) |
Long strip material handling apparatus
In view of the foregoing, it is an object of the present invention to provide a web material handling apparatus which is used with a pair of web transporting assemblies which transport a web material ... Read More
Inventors: Kogane, Mikio; Kimura, Tsutomu;, Assignee: Fuji Photo Film Co., Ltd. (Kanagawa, JP) |
High performance MESFET transistor for VLSI implementation
It is a principal object of the present invention to provide a new and improved GaAs buffer amplifier. It is another principal object of the present invention to provide a new GaAs depletion mode devi... Read More
Inventors: Ransom, Stephen A.; Stickel, Tedd K.;, Assignee: Sperry Corporation (New York, NY) |
Lead frame structure
OF THE INVENTION The present invention provides a novel molding process and lead frame structure for the manufacture of a variety of molded electrical products. By way of example, the invention may b... Read More
Inventors: Meddles, Dennis;, Assignee: International Rectifier Corporation (Los Angeles, CA) |
Thromboxane B.sub.2 assay for coronary artery thrombosis
OF THE INVENTION Thromboxane B.sub.2 has been shown to be of use for the diagnosis of renal allograft rejection (M. L. Foegh et al., "Urine i-TXB.sub.2 in Renal Allograft rejection," Lancet ii:431 (A... Read More
Inventors: Foegh, Marie L.; Ramwell, Peter W.;, Assignee: |
Photodetector having high speed and sensitivity
The present invention provides a photodetector in a small compact package that offers an advantageous combination of sensitivity and speed; it has a high sensitivity while retaining high speed. The pr... Read More
Inventors: Morse, Jeffrey D.; Mariella, Jr., Raymond P.;, Assignee: The United States of America as represented by the United States (Washington, DC) |
Determining optical signal transit delay time in an optical interferometer
I claim: 1. An optical interferometer including an optical delay time determination system, comprising: an optical waveguide loop; means for providing a pair of light waves counter-propagating in said... Read More
Inventors: Ferrar, Carl M.;, Assignee: |
Method of making an integrated circuit structure with self-aligned oxidation to isolate extrinsic base from emitter
It is therefore an object of this invention to provide an improved integrated circuit structure having a self-aligned base contact with an isolating area between the extrinsic base and the emitter ele... Read More
Inventors: Iranmanesh, Ali; Schmidt, Christopher O.;, Assignee: Advanced Micro Devices, Inc. (Sunnyvale, CA) |
Method of making thin film field effect transistors for a liquid crystal display device
The present invention therefore relates to a method for the manufacture of at least one thin film field effect transistor of the coplanar type and with self-alignment of the electrodes, wherein the me... Read More
Inventors: Szydlo, Nicolas; Boulitrop, Francois; Kasprzak, Rolande;, Assignee: Thomson-CSF (Paris, FR) |
Method of manufacturing thyristor with integrated power supply for an associated circuit
What is claimed is: 1. A method for the manufacture of a thyristor having a p-emitter, an n-base, p-base, and an n-emitter being interconnected between anode and cathode electrodes respectively, and h... Read More
Inventors: Sittig, Roland;, Assignee: Siemens Aktiengesellschaft (Berlin and Munich, DE) |
Semiconductor integrated circuit having a built-in power voltage generator
: It is an object of the present invention to provide a semiconductor integrated circuit having a functional circuit operating reliably with an internal power voltage generated therein. It is another ... Read More
Inventors: Hoshi, Katsuji;, Assignee: NEC Corporation (Tokyo, JP) |
Making a self aligned semiconductor device
An object of this invention is to provide a semiconductor device and a method of manufacturing it whereby semiconductor devices of a high level of circuit integration and high reliability can be manuf... Read More
Inventors: Ogura, Mitsugi; Ariizumi, Shioji; Horiguchi, Fumio; Masuoka, Fujio;, Assignee: Kabushiki Kaisha Toshiba (Kawasaki, JP) |
Charge-coupled device comprising semiconductors having different forbidden band widths
What we claim is: 1. A charge-coupled device comprising a substrate constituted by a first doped semiconductor, an array of metallic electrodes disposed in succession along an axis and isolated from s... Read More
Inventors: Borel, Joseph; Lacour, Jacques; Merckel, Gerard;, Assignee: Commissariat a l'Energie Atomique (Paris, FR) |
MIS-integrated semiconductor device
It is an object of the present invention to form a MOST, for example a MOS-SIT, whose impurity density in a channel region is lower than that of an ordinary MOST on a substrate and which is formed in ... Read More
Inventors: Shimbo, Masafumi;, Assignee: Kabushiki Kaisha Daini Seikosha (Tokyo, JP) |
Semiconductor devices and method for making the same
An object of the present invention is to provide a construction capable of improving carrier mobilities in both MOSFETs and BIP transistors in common, and a method for making the same. The present inv... Read More
Inventors: Kobayashi, Yutaka; Suzuki, Takaya;, Assignee: Hitachi, Ltd. (Tokyo, JP) |
Stereoscopic television system
To solve the above-mentioned problems an object of the present invention is to provide a stereoscopic television system comprising a plurality of camera units for providing stereoscopic images, which ... Read More
Inventors: Sudo, Hajime;, Assignee: Kabushiki Kaisha Toshiba (Kawasaki, JP) |
Application of grown oxide bumper insulators to a high-speed VLSI SASMESFET
It is thus an important object of the invention to provide a high-speed VLSI Self-Aligned Schottky metal semi-conductor Field Effect Transistor having a relatively high operating frequency and low ser... Read More
Inventors: Yeh, Keming W.; Bol, Izya;, Assignee: Xerox Corporation (Stamford, CT) |
Method of making silicon-on-sapphire FET
The improved field effect transistor structure employs a sapphire substrate which eliminates the need for P-N junction isolation; there is a reduction in source-to-drain feed-through capacitance, and ... Read More
Inventors: Cady, William R.; Yu, SePuan; Eshbach, John R.;, Assignee: General Electric Company (Schenectady, NY) |
Process for making refractory metal silicide cap for protecting multi-layer polycide structure
The present invention disclosed and claimed herein comprises a method for forming a polycide structure that has an oxidation resistant cap formed thereon. The method includes first forming a layer of ... Read More
Inventors: Miller, Robert O.; Liou, Fu-Tai;, Assignee: SGS-Thomson Microelectronics, Inc. (Carrollton, TX) |
Method of fabrication of bubble domain device structures
Briefly, and in general terms, there is described a method for producing a microelectronic device which utilizes a suitable substrate which is covered by a suitable isolation layer. A layer of non-fer... Read More
Inventors: Oeffinger, Thomas R.; Bailey, Robert F.; Kobayashi, Tsutomu; Reekstin, John P.;, Assignee: Rockwell International Corporation (El Segundo, CA) |
Device lithography by selective ion implantation
The following detailed description relates to a lithography process whereby ions are selectively implanted into a material and subsequently treated to form a negative tone pattern in the material. Th... Read More
Inventors: Taylor, Gary N.; Venkatesan, Thirumalai N. C.;, Assignee: Bell Telephone Laboratories, Incorporated (Murray Hill, NJ) |
Method for manufacturing pressure contact semiconductor devices
The present invention is directed to solving the problems pointed out above, and has for its object to provide a semiconductor device capable of keeping the load of the pan spring at a constant value ... Read More
Inventors: Ohdate, Mitsuo;, Assignee: Mitsubishi Denki Kabushiki Kaisha (Tokyo, JP) |
Manufacturing a wiring formed inside a semiconductor device
What is claimed is: 1. A method of manufacturing semiconductor devices, comprising the steps of: preparing a semiconductor substrate, on the surface of which is formed a first insulating layer having ... Read More
Inventors: Nakahara, Moriya; Saito, Yasuyuki; Shirai, Kenichi; Itabashi, Yasushi; Turugai, Takashi;, Assignee: Kabushiki Kaisha Toshiba (Kawasaki, JP) |
Laser photochemical synthesis coating of optical fiber
I claim: 1. In a method of producing an optical fiber of high mechanical strength from a high purity fused silica preform rod wherein the preform rod is heated to its yield point at about 2000.degree.... Read More
Inventors: Merritt, James A.;, Assignee: The United States of America as represented by the Secretary of the Army (Washington, DC) |
Impregnated wood product having a bleached or white appearance and process for making the same
OF THE INVENTION As indicated above, the invention resides in the impregnation of wood with a solution of a polymeric resin whitening agent in a polymerizable monomer, and after uniform distribution ... Read More
Inventors: Witt, Alvin E.;, Assignee: PermaGrain Products, Inc. (Media, PA) |
Method of fabricating Schottky gate-type GaAs field effect transistor
It is an object of the present invention to provide a method of manufacturing a semiconductor device, wherein source and drain regions can be formed by self alignment with respect to a gate region, an... Read More
Inventors: Shimada, Kizashi; Akiyama, Tatsuo; Koshino, Yutaka;, Assignee: Kabushiki Kaisha Toshiba (Kawasaki, JP) |
Method for forming a protecting film on side walls of a semiconductor device
It is a primary object of the present invention to provide a method for forming a protecting film on only the side walls of a semiconductor device at which walls a PN junction is exposed. It is anothe... Read More
Inventors: Imai, Hajime; Morimoto, Masahiro; Fujiwara, Takao;, Assignee: Fujitsu Limited (Kanagawa, JP) |
Selective oxidation method
OF THE INVENTION This invention relates to a selective oxidation method and in particular, to an oxide isolation technique. Fabrication of semiconductor integrated circuits requires essentially isola... Read More
Inventors: Kaji, Tadao; Kamei, Tsuneaki; Miyamoto, Keiji;, Assignee: Hitachi, Ltd. (JA) |
Method of fabricating narrow deep grooves in silicon
In accordance with the present invention, a pattern of submicron oxidation masking elements is formed on the surface of a semiconductor substrate. A thick oxide layer is formed on the surface of a sem... Read More
Inventors: Hunter, William R.;, Assignee: Texas Instruments Incorporated (Dallas, TX) |
Quantum Computing 
