Dielectric barrier material
The present invention comprises a method of fabricating an integrated circuit. A substrate comprising a semiconductor material and having a first surface is provided. A first layer of metalization int... Read More
Inventors: Erie, David G.; Roberts, Jon A.; Lee, Eddie C.;, Assignee: Honeywell Inc. (Minneapolis, MN) |
Method of joining beam leads with projections to device electrodes
It is, accordingly, a primary object of this invention to provide a method of manufacturing a semiconductor device which can solve the abovestated problems of conventional methods. Another object of t... Read More
Inventors: Hatada, Kenzo;, Assignee: Matsushita Electric Industrial Co. Ltd. (Osaka, JP) |
Semiconductor device and process for producing the same, and tape carrier used in said process
For the recent semiconductor devices, the higher reliability is required. To this end, the aging is achieved as a reliability test in which a semiconductor device is subjected to an electrical operati... Read More
Inventors: Ohtani, Hideya; Momoi, Toshimitsu; Ooi, Eiji; Sakuraba, Shuhei; Morita, Masayuki; Wakashima, Yoshiaki;, Assignee: Hitachi, Ltd. (Tokyo, JP) |
Process for self aligning a source region with a field oxide region and a polysilicon gate
A method and apparatus for self-aligning a source diffusion to field oxide regions, poly word lines and gate edges is disclosed. In the following description, numerous specific details are set forth,... Read More
Inventors: Tang, Daniel N.; Lu, Wen-Juei;, Assignee: Intel Corporation (Santa Clara, CA) |
Use of implanted ions to reduce oxide-nitride-oxide (ONO) etch residue and polystringers
The present invention provides for a method of manufacturing a memory cell which prevents the formation of poly stringers resulting from an ONO fence. ONO fences typically result from an anisotropic e... Read More
Inventors: Early, Kathleen R.;, Assignee: Advanced Micro Devices (Sunnyvale, CA) |
Method of fabricating flash memory
Therefore, the invention provides method of fabricating a flash memory, which has a high integration density for memory cells arrangement without the requirement of a device isolation structure betwee... Read More
Inventors: Sheu, Yau-Kae;, Assignee: United Microelectronics Corp. (Hsinchu, TW) |
Vertical semiconductor device and method of manufacturing the same
In the light of the above problems, it is an object of the present invention to provide an accumulation type field-effect transistor which has a high withstand voltage and suffers from a reduced leaka... Read More
Inventors: Konishi, Yoshinori;, Assignee: Fuji Electric Co. (JP) |
High voltage semiconductor device capable of increasing a switching speed
OF THE INVENTION Embodiments of the present invention will now be described with reference to the accompanying drawings. (First Embodiment) FIG. 1 is a cross-sectional view showing a structure of an ... Read More
Inventors: Nakagawa, Akio; Matsudai, Tomoko;, Assignee: Kabushiki Kaisha Toshiba (Tokyo, JP) |
Method of making MOS transistor having improved oxynitride dielectric
In accordance with the invention, a silicon oxide dielectric is grown in a nitrous oxide (N.sub.2 O) environment and then nitrided in an anhydrous ammonia (NH.sub.3) atmosphere to introduce a sufficie... Read More
Inventors: Kwong, Dim-Lee; Yoon, Giwan; Kim, Jonghan;, Assignee: The Regents of the University of Texas System (Austin, TX) |
Non-volatile memory structure including protection and structure for maintaining threshold stability
It has been discovered that the V.sub.ts instability is due to plasma induced charging damage on the dielectric layers of a nonvolatile memory device. Accordingly, in a first aspect, a non-volatile me... Read More
Inventors: Fang, Hao; Haddad, Sameer; Chang, Chi;, Assignee: Advanced Micro Devices, Inc. (Sunnyvale, CA) |
Method of making dense vertical programmable read only memory cell structure
These and additional objects are accomplished by the various aspects of the present invention, wherein, briefly and generally, according to one aspect, EPROM and EEPROM cells are reduced in size, and ... Read More
Inventors: Yuan, Jack H.; Samachisa, Gheorghe; Guterman, Daniel C.; Harari, Eliyahou;, Assignee: SanDisk Corporation (Santa Clara, CA) |
Method of fabricating a high dielectric constant interpolysilicon dielectric structure for a low voltage non-volatile memory
What is claimed is: 1. A method of fabricating a dielectric structure in a non-volatile memory, comprising the steps of: (A) providing a first polysilicon layer; (B) forming a nitride layer on the fir... Read More
Inventors: He, Yue-Song; Ibok, Effiong;, Assignee: Advanced Micro Devices, Inc. (Sunnyvale, CA) |
Methods for forming a control gate apparatus in non-volatile memory semiconductor devices
These needs and others are met by the present invention, which provides methods that increase the process control during the fabrication of semiconductor devices, and in particular, during the formati... Read More
Inventors: Bui, Nguyen Duc;, Assignee: Advanced Micro Devices, Inc. (Sunnyvale, CA) |
Dielectric device
In view of the present need as described above, an object to the present invention is to provide a dielectric device having a high permittivity and sufficient dielectric characteristics. According to ... Read More
Inventors: Nakao, Hironobu;, Assignee: Rohm Co., Ltd. (Kyoto, JP) |
Method of making deep sub-micron meter MOSFET with a high permitivity gate dielectric
The method of the present invention includes forming a silicon oxynitride layer on a substrate. The silicon oxynitride layer is preferably deposited by thermal oxidation in N.sub.2 O or NO ambient. Th... Read More
Inventors: Wu, Shye-Lin;, Assignee: Texas Instruments-Acer Incorporated (Hsinchu, TW) |
High dielectric TiO.sub.2 -SiN composite films for memory applications
One object of the present invention is to provide a method for fabricating a high dielectric composite structure for use in advanced memory applications. Another object of the present invention is to ... Read More
Inventors: Bronner, Gary Bela; Cohen, Stephan Alan; Dobuzinsky, David Mark; Gambino, Jeffrey Peter; Ho, Herbert Lei; Madden, Karen Popek;, Assignee: International Business Machines Corporation (Armonk, NY) |
MOSFET with a high permitivity gate dielectric
The method of the present invention includes forming a silicon oxynitride layer on a substrate. The silicon oxynitride layer is preferably deposited by thermal oxidation in N.sub.2 O or NO ambient. Th... Read More
Inventors: Wu, Shye-Lin;, Assignee: Texas Instruments--Acer Incorporated (Hsinchu, TW) |
Method of depositing thin nitride layer on gate oxide dielectric
The present invention is a gate structure in a transistor and method for fabricating the structure. A gate structure is formed on a substrate. The gate structure includes three layers: an oxide layer,... Read More
Inventors: Bryant, Frank Randolph;, Assignee: SGS-Thomson Microelectronics, Inc. (Carrollton, TX) |
Method of forming high density flash memories with MIM structure
The method of the present invention includes forming a gate oxide layer on a substrate. Subsequently, a doped polysilicon layer is deposited on the gate oxide layer. Then, a silicon nitride layer is d... Read More
Inventors: Wu, Shye-Lin;, Assignee: |
Method for fabricating a capacitor
The invention provides a method for fabricating a capacitor. A first metal layer is formed on a provided substrate. A dielectric film is formed on the first metal layer. The dielectric film can be a m... Read More
Inventors: Liou, Fu-Tai; Lur, Water; Su, Kuan-Cheng; Wu, Juan-Yuan;, Assignee: United Microelectronics Corp. (Hsinchu, TW) |
4-Aminothiazole
What is claimed is: 1. 4-Aminothiazole and its acid addition salts. 2. The compound of claim 1 being the base of the structure: ##SPC1## 3. The compound of claim 1 being the hydrochloride salt of 4-am... Read More
Inventors: Gallagher, Jr., Gregory; Kingsbury, William D.;, Assignee: SmithKline Corporation (Philadelphia, PA) |
Single poly memory cell and array
In light of the above, it is an object of the invention to provide an improved non-volatile semiconductor memory device that provides the lowest possible cost compared to prior art devices. It is anot... Read More
Inventors: Lancaster, Loren T.; Hirose, Ryan T.;, Assignee: NVX Corporation (Colorado Springs, CO) |
Etox cell programmed by band-to-band tunneling induced substrate hot electron and read by gate induced drain leakage current
An ETOX cell formed in a semiconductor substrate is disclosed. The ETOX cell comprises: a p-well formed within said substrate; a floating-gate formed above said p-well, said floating-gate separated fr... Read More
Inventors: Chi, Min-hwa;, Assignee: Worldwide Semiconductor MFG (Hsinchu, TW) |
Semiconductor integrated circuit device, memory module, storage device and the method for repairing semiconductor integrated circuit device
Our preceding patent application has proposed the use of storage elements of one flash memory for repairing a defect or to effect trimming within a closed range of the flash memory. In view of the lar... Read More
Inventors: Hiraki, Mitsuru; Shukuri, Shoji;, Assignee: |
Semiconductor device having sidewall insulating film
It is therefore an object of the present invention to prevent effectively the formation of fence-shaped residue when a conductive layer formed on a sidewall insulating film is anisotropically etched u... Read More
Inventors: Hoshiko, Takahiro; Ogawa, Toshiaki;, Assignee: Mitsubishi Denki Kabushiki Kaisha (Tokyo, JP) |
Method of making split gate flash EEPROM cell by separating the tunneling region from the channel
What is claimed is: 1. A method manufacturing a flash EEPROM cell, comprising the steps of: forming a buried drain region in a portion of a silicon substrate; forming a first and a second field oxide ... Read More
Inventors: Ahn, Byung Jin;, Assignee: Hyundai Electronics Industries Co., Ltd. (Kyungki-Do, KR) |
Semiconductor memory device having word line conductors provided at lower level than memory cell capacitor and method of manufacturing same
Thus, the present inventor experimentally produced and investigated a COB (Capacitor Over Bitline) structure as a means for solving this problem, as shown in FIGS. 1A and 1B and FIGS. 2A and 2B. FIG. ... Read More
Inventors: Iwasa, Shoichi;, Assignee: Nippon Steel Corporation (Tokyo, JP) |
Electrically erasable programmable logic device
The preferred embodiment in accordance with the present invention will be discussed in detail with reference to FIG. 2(a) to FIG. 6. It is understood that the type of semiconductor regions, device la... Read More
Inventors: Hsu, Ching-Hsiang; Lin, Yen-Tai; Chu, Chih-Hsun; Shen, Shih-Jye; Yang, Ching-Sung; Ho, Ming-Chou;, Assignee: eMemory Technology Inc. (Hsin-Chu, TW) |
Short channel IGBT with improved forward voltage drop and improved switching power loss
OF THE DRAWINGS Referring first to FIGS. 1 and 2, there is shown a portion of the active area of a typical IGBT device. Only a few of the large number of hexagonal cells in the IGBT device are shown.... Read More
Inventors: Gould, Herbert J.;, Assignee: International Rectifier Corporation (El Segundo, CA) |
Semiconductor non-volatile memory device having a NAND cell structure
In light of the above, therefore, it is an object of the invention to provide an improved non-volatile semiconductor memory device that provides better data storage reliability compared to prior art d... Read More
Inventors: Hirose, Ryan T.; Lancaster, Loren T.;, Assignee: Cypress Semiconductor Corporation (San Jose, CA) |
Quantum Computing 
