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Analog-to-digital conversion system and method with reduced sparkle codes
| Details |
Inventors: Knudsen, Niels;
Assignee: National Instruments Corporation (Austin, TX)
Primary Examiner: Williams; Howard L.
Assistant Examiner:
Attorney, Agent or Firm: Conley, Rose & Tayon, Hood; Jeffrey C.
Analog-to-digital conversion with reduce sparkle codes. An analog-to-digital converter includes a plurality of comparators each coupled to receive an analog input signal, and an adder decoder coupled to receive the outputs of the comparators. Each comparator also receives a respective reference signal for comparison with the analog input signal. Each comparator outputs a digital value indicative of the comparison between the analog input signal and the respective reference signal. The adder decoder adds the digital output signals generated by the comparators and outputs a digital representation of the analog input signal based on the result. This system may advantageously provide for a more efficient way to convert analog signals to digital signals without the generation of sparkle codes. The adder decoder may be a pyramid of adders. A sigma-delta converter may include the comparators in the analog-to-digital portion in the feedback loop and the adder decoder outside of the feedback loop. The thermometer code is provided directly to the digital-to-analog converter of the sigma-delta converter and to the adder decoder. |
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DETAILED DESCRIPTION The present invention comprises a system and method for analog-to-digital conversion.
The system comprises, in one embodiment, a plurality of comparators each coupled to receive an analog input signal, and an adder decoder coupled to receive the outputs of the comparators.
Each comparator also receives a respective reference signal for comparison with the analog input signal.
Each comparator is configured to output a digital value indicative of the comparison between the analog input signal and the respective reference signal.
The adder decoder is configured to output a digital representation of the analog input signal based on the result and to add the digital output signals generated by the comparators.
This system may advantageously provide for a more efficient way to convert analog signals to digital signals without the generation of sparkle codes.
In one embodiment, the adder decoder of the analog-to-digital comparator comprises a pyramid of adders.
The first stage of the pyramid of adders may comprise 2-bit adders.
Each additional stage of the pyramid of adders may comprise half as many n+1 bit adders as the n bit adders of the stage below.
In one embodiment, the pyramid of adders is implemented in a programmable logic, preferably an FPGA.
Similarly, a method is also contemplated, comprising in one embodiment, first, receiving a thermometer code output from a plurality of comparators.
If there are an odd number of comparators, an extra zero may be added.
The method next counts the number of ones in the thermometer code.
The number of zeros in the thermometer code may be interpreted as the decode of the thermometer code.
The decode of the thermometer code is output as a digital representation of the input analog signal that lead to the thermometer code.
A sigma-delta converter is also contemplated including an analog-to-digital converter having the adder decoder of the present invention.
The sigma-delta converter preferably includes an input summing junction configured to accept an analog input signal and a feedback signal, a loop filter coupled to the output of the summing junction, a plurality of comparators coupled to the output of the loop filter, and a digital-to-analog converter coupled to receive the output of the plurality of comparators, and to provide the feedback signal to the summing junction
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