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Analog-to-digital converter utilizing devices with current versus voltage characteristics with a plurality of peaks and negative resistance regions between peaks
| Details |
Inventors: Kuo, Tai-Haur; Lin, Hung C.;
Assignee: University of Maryland at College Park (College Park, MD)
Primary Examiner: Fuller; Benjamin R.
Assistant Examiner: Le; Nancy
Attorney, Agent or Firm: Novack; Martin
An analog-to-digital converter circuit is disclosed for receiving an analog input signal and producing a digital output having a plurality of binary bits representative of the input signal. A number of devices are utilized, each of which has a voltage versus current characteristic with a plurality of peaks, and negative resistance regions between said peaks. In the illustrated embodiments, these devices are resonant tunneling diodes. For each bit to be produced, a pair of said devices are provided, each being coupled in series arrangement with a resistor. Predetermined portions of the input signal are applied to both of the series arrangements for each respective bit to be produced. Signals from both of the series arrangements are combined for each respective bit to be produced. The combined outputs respectively represent the produced binary bits. In the preferred embodiment, the means for applying predetermined portions of the input signal comprises means for applying different fractional portions of the input signal to respective pairs of series arrangements. In this embodiment, the input signal comprises an input voltage, and a voltage offset is applied to the input signal. The transition between states ("0" to "1", or vice versa) is very fast due to the high switching speed of the narrow negative resistance region of the RTD's I-V characteristic. Also, because of the judicious use of offsets, the quantization uncertainty is one-half the last significant bit size. |
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DETAILED DESCRIPTION The present invention is directed to an analog-to-digital converter circuit for receiving an analog input signal and producing a digital output having a plurality of binary bits representative of the input signal.
In the disclosed embodiments of the invention, a number of devices are utilized, each of which has a voltage versus current characteristic with a plurality of peaks, and negative resistance regions between said peaks.
In the illustrated embodiments, these devices are resonant tunneling diodes.
For each bit to be produced, a pair of said devices are provided, each being coupled in series arrangement with a resistive means.
Means are provided for applying predetermined portions of the input signal to both of the series arrangements for each respective bit to be produced.
Means are also provided for combining signals from both of the series arrangements for each respective bit to be produced.
The outputs of the combining means respectively represent the produced binary bits.
In the preferred embodiment of the invention, the means for applying predetermined portions of the input signal comprises means for applying different fractional portions of the input signal to respective pairs of series arrangements.
In this embodiment, the input signal comprises an input voltage.
Means are provided for applying a voltage offset to the input signal.
Also, the means for applying predetermined portions of the input signal includes a voltage divider.
In one form of the invention, the means for combining signals from said respective series arrangements comprises means for adding the voltages across the respective resistive means of each said pair of series arrangements.
In another form of the invention, the means for combining signals from said respective series arrangements comprises means for subtracting the voltages across the respective resistance means of each said pair of series arrangements.
The circuit of the present invention has a number of important advantages.
The transition between states ("0" to "1", or vice versa) is very fast due to the high switching speed of the narrow negative resistance region of the RTDs I-V characteristic
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