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Continuously integrating high-resolution analog-to-digital converter
| Details |
Inventors: Goeke, Wayne C.;
Assignee: Hewlett-Packard Company (Palo Alto, CA)
Primary Examiner: Hoff; Marc
Assistant Examiner:
Attorney, Agent or Firm:
A continuously integrating analog-to-digital converter (ADC) calculates a digital output by integrating an input voltage over a number of time intervals using a multisloping technique to define the input voltage in terms of a slope count. A residue ADC is used in lieu of a run-down interval of the integrator to calculate the least significant bits of the ADC digital output. This is accomplished by first sampling the integrator output voltage, and then after a number of time intervals, sampling the integrator output voltage a second tune. The difference between the two residue voltages is converted into a fractional slope count by multiplication with a calibration constant. The fractional slope count can then be added to the slope count from the integrator, so that the resulting total slope count is directly proportional to the input voltage at a high resolution. Multiplication by the calibration constant may be effectuated by controlling the gain on the residue ADC with a digital-to-analog converter (DAC), or like device. |
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DETAILED DESCRIPTION The present invention provides for a system and method for converting an input analog signal, which can be continuously applied, into an output digital signal.
The system has an integrating means, a residue analog-to-digital converter (ADC), and control/output logic.
The integrating means integrates the input analog signal, which is combined with input reference signals so as to maintain the integrated output within predetermined voltage limits.
The integrating means provides an integrator count, or slope count.
The residue ADC measures the integrated output at the beginning and end of a time interval corresponding to a reading.
The integrated output sampled at the begining of the time interval is the first residue voltage, whereas the integrated output sampled at the end of the time interval is the second residue voltage.
The control/output logic is connected to the integrating means and the residue ADC.
The control/output logic converts the first and second residue voltages into a residue count.
Moreover, it mathematically combines the residue count and the integrator count within the time interval of the reading so as to derive the output digital signal.
The present invention provides for a high resolution and high speed analog-to-digital conversion without the need for a run-down interval.
Another advantage of the present invention is that the integrator of an ADC need not be zeroed, or initialized, before commencing a reading.
Moreover, readings can be performed contiguously, or back-to-back.
Yet another advantage of the present invention is that there is no need to terminate the input voltage V.
sub.
IN so that a high resolution result can be achieved.
The input voltage V.
sub.
IN, as well as the integrator, may be permitted to run continuously.
Another advantage of the present invention is that readings can be overlapped.
Essentially, the integrating ADC aperture can be shaped.
By changing the shape of the ADC aperture, the frequency response of the integrating ADC can be changed
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