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 Current sensing analog to digital converter and method of use

Details
Inventors: Gangstoe, Gunnar; Aas, Arne;
Assignee: Atmel Corporation (San Jose, CA)
Primary Examiner: Barnie; Rexford
Assistant Examiner: Nguyen; Khai
Attorney, Agent or Firm: Sawyer Law Group LLP

A current sensing analog to digital converter (CS-ADC) is disclosed. The current sensing analog to digital converter comprises a modulator adapted to sense a change in current and generate an oversampled signal. The converter further includes a decimation filter system coupled to modulator for removing out of band noise from the signal and reduce the data rate to achieve a high resolution signal. A current sensing analog to digital converter (CS-ADC) is disclosed that samples the charge or discharge current flowing through an external sense resistor R.sub.SENSE. The sample from the R.sub.SENSE is processed by a delta-sigma modulator which generates an over sampled noise shaped signal. From this signal a decimation filter system removes the out-of band noise and reduces the data rate to achieve a high-resolution signal. The CS-ADC also provides regular current detection. The regular current detection compares the data from conversion against charge/discharge threshold levels specified by the user. To save power a special mode where the user configures the regular current sampling interval is provided. This allows ultra-low power operation in power-save mode when small charge or discharge currents are flowing.

DETAILED DESCRIPTION A current sensing analog to digital converter (CS-ADC) is disclosed.
The current sensing analog to digital converter comprises a modulator adapted to sense a change in current and generate an oversampled signal.
The converter further includes a decimation filter system coupled to modulator for removing out of band noise from the signal and reduce the data rate to achieve a high resolution signal.
A current sensing analog to digital converter (CS-ADC) is disclosed that samples the charge or discharge current flowing through an external or internal sense resistor R.
sub.
SENSE.
The sample from the R.
sub.
SENSE is processed by a delta-sigma modulator which generates an over sampled noise shaped signal.
From this signal a decimation filter system removes the out-of band noise and reduces the data rate to achieve a high-resolution signal.
The decimation process is split in two to produce an instantaneous current output with resolution and conversion time suitable for instantaneous current measurements, and an accumulate current output signal with conversion time and resolution suitable for charge flow accumulation The CS-ADC also provides regular current detection.
The regular current detection compares the data from conversion against charge/discharge threshold levels specified by the user.
To save power a special mode where the user configures the regular current sampling interval is provided.
This allows ultra-low power operation in power-save mode when small charge or discharge currents are flowing.



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