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Method and apparatus for obtaining linearity in a pipelined analog-to-digital converter
| Details |
Inventors: Soenen, Eric G.;
Assignee: Texas Instruments Incorporated (Dallas, TX)
Primary Examiner: Wamsley; Patrick
Assistant Examiner:
Attorney, Agent or Firm: Swayze, Jr.; W. Daniel, Courtney; Mark E., Telecky, Jr.; Frederick J.
A pipelined analog-to-digital converter system (10) is responsive to an analog input signal (18). The system includes four pipeline stages (11-14), which each produce a respective digital output (26-29) that is coupled to a combining circuit (16). The combining circuit generates the digital output (41) of the system. Each pipeline stage includes an analog-to-digital converter (101), which generates the digital output for that stage. A shuffler circuit (103) randomly shuffles the bits of this digital output, in order to generate shuffled switching signals, which in turn are used to control electronic switches (206-209, 211-214) associated with several capacitors (C1-C4). By randomly shuffling the switching signals, the effects caused by variation of any capacitor from an ideal value are randomized. This avoids nonlinearity such as harmonic distortion in the analog output signal (21) from that stage. |
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DETAILED DESCRIPTION From the foregoing, it may be appreciated that a need has arisen for a method and apparatus of effecting pipelined analog-to-digital conversion in a manner which reduces or avoids nonlinearities such as harmonic distortion.
According to the present invention, a method and apparatus are provided to address this need, and involve effecting pipelined analog-to-digital conversion in first and second stages of conversion which each use an analog input to facilitate generation of an analog output and a multi-bit digital output, the analog input of one of the first and second stages being derived from the analog output of the other of the first and second stages.
The first stage of conversion involves effecting an analog-to-digital conversion of the analog input of the first stage so as to generate a multi-bit digital output that is based on the analog input of the first stage and that serves as the multi-bit digital output of the first stage.
The first stage further involves shuffling a plurality of switching signals derived from the multi-bit digital output of the analog-to-digital conversion so as to generate a plurality of shuffler output signals, the shuffling being effected according to a mapping function which relates each shuffler output signal to a respective switching signal, and the shuffling including dynamic variation of the mapping function so as to dynamically vary which of the shuffler output signals corresponds to which of the switching signals.
The first stage also involves generating an analog residue signal which represents a difference between a magnitude corresponding to the analog input of the first stage and a magnitude corresponding to the multi-bit digital output of the analog-to-digital conversion, including selective switching of each of a plurality of circuit portions to one of first and second states in response to a respective shuffler output signal, the first and second states being different, and the analog residue signal serving as the analog output of the first stage, and having a magnitude which is a function of the number of the circuit portions which are switched so as to be in the first state
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