Line interface unit retrofit circuit

DETAILED DESCRIPTION According to the present invention, as embodied and broadly described herein, a retrofit circuit for superframe channel banks is provided comprising status means and comparator means.
Status means may be embodied as a status circuit which uses a first resistor and a second resistor.
The retrofit circuit communicates one of three conditions from a LIU to a RU, using only one external connection between the LIU and the RU.
A common ground is assumed between all units.
A received signal on the LIU from the T1 network, is either ESF or SF formatted.
The LIU can have a detection circuit and status circuit which outputs a first status signal which may be a first voltage level, e.
g.
+5 volts, at an external connection when a received signal is ESF with no yellow alarm.
The detection and status circuit output a second status signal which may be a second voltage level, e.
g.
+2.
5 volts, at the external connection when the received signal is ESF with yellow alarm, but the SF format does not have bit two equal a zero bit.
The detection and status circuit output a third status signal which may be a third voltage level, e.
g.
0 volts, at the external connection when the received signal has ESF with yellow alarm and SF format with bit two equal a zero bit (B2=0) for all received bytes.
The comparison means has a first threshold and a second threshold and is located on the RU.
The comparison means outputs a first output signal at a first output terminal and a third output signal at a second output terminal when it detects that the first voltage level at the external connection is above the first threshold.
The comparison means outputs a second output signal at the first output terminal and a third output signal at the second output terminal when it detects that the second voltage level at the external connection is between the first threshold and the second threshold.
The comparison means outputs a second output signal at the first output terminal and a fourth output signal at the second output terminal when it detects that the third voltage level at the external connection is below the second threshold