Ones density monitor

DETAILED DESCRIPTION A digital transmission line interface circuit and a method of determining that a carrier is back on line and not lost is disclosed herein.
The circuit includes a 31 bit shift register and circuitry to continuously monitor all 31 values of the shift register to determine if at least three of the 31 registers plus the incoming bit contains a logic "1".
If at least three of the registers contain a logic "1" and the present bit being sampled is a logic "1", the interface circuit clears its lost carrier signal to indicate that the carrier is back on line.
Specifically, a line carrying a data stream is connected to a 31-bit shift register and to one input of a two-bit up/down counter.
As a pulse enters the 31-bit shift register, the up/down counter is incremented.
The output of the 31-bit shift register is connected to a second input of the two-bit up/down counter.
As a pulse exits the shift register, the up/down counter is decremented.
If, at any one time, the 31-bit shift register contains three pulses and the present bit arriving is a pulse, the up/down counter will increment to a value of four thereby causing it to reset a signal reflective of a "carrier off line" state to reflect that the carrier is back on line.