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 Trench depletion MOSFET
The present invention is a trench power MOSFET with a unique structure which overcomes the above-...


 ***WITHDRAWN PATENT AS PER THE LATEST USPTO WITHDRAWN LIST*** *** NO IMAGES AVAILABLE***
Description:...


 Method for forming a MOSFET with substrate source contact
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 Integrable MOS and IGBT devices having trench gate structure
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 Method for the preparation of a pattern overlay accuracy-measuring mark
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 Power insulated-gate transistor having three terminals and a manufacturing method thereof
OF THE PREFERRED EMBODIMENTS FIGS. 2 illustrates the structure of an insulated-gate transistor in ...


 High voltage MOS structure

Details
Inventors: Beasom, James D.;
Assignee: Harris Corporation (Melbourne, FL)
Primary Examiner: James; Andrew J.
Assistant Examiner: Soltz; David
Attorney, Agent or Firm: Barnes & Thornburg

The threshold of a double diffused insulated gate field effect transistor is determined by selectively positioning the source in the decreasing impurity concentration region of the body to set the peak impurity concentration in the channel region for the desired threshold voltage without modification of the process.

DETAILED DESCRIPTION The present invention relates generally to insulated gate field effect transistors and more specifically to an improved high voltage insulated gate field effect transistor.
Many MOS applications require a device which can operate with a drain voltage much higher (for N channel device) or lower (for P channel device) than the source, body and gate voltages.
In a conventional MOS structure, this requires long channels to avoid drain to source punch-through through the lightly doped body.
It also requires thick gate oxide where the gate electrode overlaps the drain to avoid gate voltage induced field crowding at the drain body junction which reduces that junction's breakdown voltage.
Both of these requirements degrade other characteristics of the device such as transconductance.
A known structure which alleviates these restrictions is the double diffused (DMOS) structure shown in FIG.
1.
It uses a lightly doped drain into which body and source diffusions are made.
In the conventional structure, the body and source portions adjacent the drain are self-aligned using a common mask edge.
Channel length is thus the difference between lateral diffusion of the source and that of the body.
Punch-through is avoided by allowing the drain-body depletion layer to spread primarily into the drain which is more lightly doped than the body.
The gate overlaps only the lightly doped part of the drain where it acts as a field plate which tends to increase drain-body junction breakdown.
Thus, the double diffused structure alleviates the problems of the conventional MOS when high voltage is required.
The double diffused structure has several disadvantages.
One is a result of the source-body self alignment.
For low threshold voltage V.
sub.
T, the maximum channel surface doping must be low.
For high drain-source voltage, the total doping under the source must be high to suppress punch through.
However, the doping under the source is essentially the same as the body doping due to the self-alignment of body and source



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